Re: 32 bit jump instruction.

[Ian Lance Taylor <iant at google dot com>]

David Daney <ddaney@avtrex.com> writes:

> > I am working on a private target where jump instruction patterns are
> > similiar to this
> >
> > jmp <24 bit offset>
> > jmp <address register> for 32 bit offsets
> >
> > if my offset is greater than 24 bits, then i have to move the offset
> > to an address register. But inside the branch instruction (in md
> > file), i am not able to generate a pseudo register because the
> > condition check for "no_new_pseudos " fails.
> >
> > Can any one suggest a way to overcome this?
> >
> This is similar to how the MIPS works.  Perhaps looking at its
> implementation would be useful.

MIPS simply reserves a register, $1.  $1 is by convention reserved for
use in assembler code.  gcc uses it for a long branch.

If you can't afford to lose a register, then I think your only option
is to pick some callee-saved register and have each branch instruction
explicitly clobber it.  Then it will be available for use in a long
branch, and it will be available for use within a basic block.  This
is far from ideal, but I don't know a better way to handle it within
gcc's current framework.

Ian