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Optimizing a 16-bit * 8-bit -> 24-bit multiplication
- From: "Shaun Jackman" <sjackman at gmail dot com>
- To: gcc at gcc dot gnu dot org, avr-gcc-list at nongnu dot org
- Date: Fri, 1 Dec 2006 17:29:07 -0700
- Subject: Optimizing a 16-bit * 8-bit -> 24-bit multiplication
- Reply-to: "Shaun Jackman" <sjackman at gmail dot com>
I would like to multiply a 16-bit number by an 8-bit number and
produce a 24-bit result on the AVR. The AVR has a hardware 8-bit *
8-bit -> 16-bit multiplier.
If I multiply a 16-bit number by a 16-bit number, it produces a 16-bit
result, which isn't wide enough to hold the result.
If I cast one of the operands to 32-bit and multiply a 32-bit number
by a 16-bit number, GCC generates a call to __mulsi3, which is the
routine to multiply a 32-bit number by a 32-bit number and produce a
32-bit result and requires ten 8-bit * 8-bit multiplications.
A 16-bit * 8-bit -> 24-bit multiplication only requires two 8-bit *
8-bit multiplications. A 16-bit * 16-bit -> 32-bit multiplication
requires four 8-bit * 8-bit multiplications.
I could write a mul24_16_8 (16-bit * 8-bit -> 24-bit) function using
unions and 8-bit * 8-bit -> 16-bit multiplications, but before I go
down that path, is there any way to coerce GCC into generating the
code I desire?
Cheers,
Shaun