This is the mail archive of the gcc@gcc.gnu.org mailing list for the GCC project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

Re: Modifying ARM code generator for elimination of 8bit writes - need help


Rask,

On Sunday 06 August 2006 02:05, Rask Ingemann Lambertsen wrote:
> Yes, it only cures the symptom, but it could take a lot of time to
> find the cause, and the gain is small, so I think it is OK to leave
> it like this for now.
OK.

> This insn was generated from the "reload_outqi" pattern. I don't
> completely understand why it isn't recognized. The (subreg:QI (reg:DI
> 11 fp) 0) part won't be matched by (match_scratch ...), but
> simplify_gen_subreg() should have simplified it to (reg:QI 11 fp)
> since this is one of the main purposes of having
> simplify_(gen_)subreg() in the first place. Try changing
>
>    operands[3] = simplify_gen_subreg (QImode, operands[2], DImode,
> 0);
>
> into
>
>    operands[3] = gen_rtx_REG (QImode, REGNO (operands[2]));
>
> (in "reload_outqi") and see if that works.

Yes, it works. Kernel and userland are compiling now. I can't find any 
errors in the generated code. Many thanks!

regards

Wolfgang
-- 
We're back to the times when men were men 
and wrote their own device drivers.

(Linus Torvalds)


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]