This is the mail archive of the
gcc@gcc.gnu.org
mailing list for the GCC project.
Re: MIPS RDHWR instruction reordering
On Sat, Jul 22, 2006 at 09:52:44AM -0700, Ian Lance Taylor wrote:
> This may be right, but I'm not sure that it is. If it is OK to
> unconditionally execute rdhwr, then it should be OK to put it in a
> delay slot. Unless that will break something when rdhwr is emulated.
> Or will the emulation code run slower when rdhwr is in a delay slot?
> That is, slower than it would if rdhwr were emulated without being in
> a delay slot?
Yes. Much, much slower. There's a fast path support for rdhwr (I'm
not sure if it is committed yet but it's definitely floating around)
which only handles the non-branch-delay case. It will still work in a
delay slot, but it's a much heavier-weight operation.
So, until and unless there is a revision of the MIPS architecture on
which this instruction is not guaranteed to trap, I think we should not
put it in a delay slot.
--
Daniel Jacobowitz
CodeSourcery