This is the mail archive of the
gcc@gcc.gnu.org
mailing list for the GCC project.
Re: MIPS RDHWR instruction reordering
- From: Atsushi Nemoto <anemo at mba dot ocn dot ne dot jp>
- To: iant at google dot com
- Cc: dan at debian dot org, gcc at gcc dot gnu dot org
- Date: Sat, 22 Jul 2006 01:53:58 +0900 (JST)
- Subject: Re: MIPS RDHWR instruction reordering
- References: <m3irn0reiq.fsf@dhcp-172-18-208-87.corp.google.com> <20060619223456.GA27012@nevyn.them.org> <m3u06gwvyw.fsf@keats.corp.google.com>
On 19 Jun 2006 16:45:43 -0700, Ian Lance Taylor <iant@google.com> wrote:
> I'm not sure, because I'm not sure what is hoisting the instruction.
>
> I tried recreating this, but I couldn't. I get this:
>
> foo:
> .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0
> .mask 0x00000000,0
> .fmask 0x00000000,0
> .set noreorder
> .cpload $25
> .set reorder
> .set noreorder
> .set nomacro
> beq $4,$0,$L7
> .set push
> .set mips32r2
> rdhwr $3,$29
> .set pop
> .set macro
> .set reorder
FYI, I found that the difference between your result (gcc 4.2) and
mine (gcc 4.1.1) is come from r108713 commit.
With r108712 I got:
foo:
.frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0
.mask 0x00000000,0
.fmask 0x00000000,0
.set noreorder
.cpload $25
.set nomacro
lw $2,%gottprel(x)($28)
.set push
.set mips32r2
rdhwr $3,$29
.set pop
addu $2,$2,$3
beq $4,$0,$L4
move $3,$0
lw $3,0($2)
$L4:
j $31
move $2,$3
And with r108713 I got:
foo:
.frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0
.mask 0x00000000,0
.fmask 0x00000000,0
.set noreorder
.cpload $25
.set nomacro
beq $4,$0,$L7
.set push
.set mips32r2
rdhwr $3,$29
.set pop
lw $2,%gottprel(x)($28)
nop
addu $2,$2,$3
lw $2,0($2)
j $31
nop
$L7:
j $31
move $2,$0
And I can not see why the commit make such a difference...
---
Atsushi Nemoto