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Re: Modifying ARM code generator for elimination of 8bit writes - need help
On Sun, 2006-06-04 at 22:01, Rask Ingemann Lambertsen wrote:
> On Sun, Jun 04, 2006 at 12:24:53PM +0100, Paul Brook wrote:
>
> > For the record these hacks are unlikely to ever be acceptable in mainline gcc.
> > They're relatively invasive changes who's only purpose is to support
> > fundamentally broken hardware.
>
> We don't yet know if they'll be invasive. There's a good chance that they
> won't be more than a few new insn patterns, a secondary output reload
> to provide a scratch register and a pair of new options.
>
I'm confident right now that these will be too invasive to include in
mainline.
> There are other targets with targets specific options to work around this or
> that bug, quirk, defect or errata. In this case, why would two options
> -mno-byte-writes and -mbyte-writes, with the latter being the default, be
> unlikely to be acceptable? In particular, the MT port has these two options:
The changes that tend to get incorporated into the compiler are to work
around bugs in the CPU, not bugs in some H/W developer's use of the
CPU. The former affect all users of the processor, the latter only that
one case.
If we started putting in hacks for the latter the compiler back-ends
would become unmaintainable in almost no time at all.
Sorry, it's just not going to happen.
R.
PS. Using swp is a bad idea IMO, this instruction is *very* slow on
some CPU implementations because of the way it interacts with caches.
It certainly isn't suitable as a generic solution to this sort of issue.