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Re: Modifying ARM code generator for elimination of 8bit writes - need help
- From: Paul Brook <paul at codesourcery dot com>
- To: gcc at gcc dot gnu dot org
- Cc: Wolfgang Mües <wolfgang at iksw-muees dot de>
- Date: Tue, 30 May 2006 21:03:54 +0100
- Subject: Re: Modifying ARM code generator for elimination of 8bit writes - need help
- References: <200605282223.33002.wolfgang@iksw-muees.de>
> I found arm.md and the moveqi insns, but because of the different
> addressing modes of strb and swpb, its not easy to make the change.
> And there must be a compiler option for this, too.
>
> Could somebody please tell me how to implement this change?
Short answer is probably not.
There are a couple of complications that spring to mind. The different
addressing modes and the fact that swp clobbers a register are the most
immediate ones.
You'll need to modify at least the movqi insn patterns, memory constraints and
the legitimate address stuff. I'm not sure about the clobber, that might need
additional reload-related machinery.
Paul