Re: HARD_REGNO_MODE_OK_FOR_CLASS Might Be Nice (tm)

[Rask Ingemann Lambertsen <rask at sygehus dot dk>]

On Wed, Dec 21, 2005 at 08:23:17PM +0200, Bernd Jendrissek wrote:

> I've been playing with my 16-bit ix86 port again,

I started coding one from scratch in about October or so. It has been
interesting.

[cut %bx as %bl and %bh in BASE_REGS]
> The simple solution was just to add %bh to BASE_REGS in
> REG_CLASS_CONTENTS; that seemed to take care of the BASE_REGS problem
> for me. 

This is actually documented, but I too overlooked that.

> On to the next cluster of problems.  I finally got around %cl
> vs %cx (for shift counts) by expanding the shift patterns first into,
> for example,
> 
> (define_expand "ashlhi3"
>   [(parallel [(set (match_operand:HI 0 "nonimmediate_operand" "")
>                    (ashift:HI (match_operand:HI 1 "general_operand" "")
>                               (match_operand:QI 2 "general_operand" "")))
>               (clobber (reg:CC FLAGS_REG))])]
>  ...
> 
> first before recognizing them with define_insn'ed patterns; that seemed
> to do the trick of forcing GCC to "know" that the ix86 shift counts have
> no more than 8 bits of significance (less even, in fact).

I'm having success with a regular define_insn:

(define_insn "<optab_shift><mode>3"
        [(set (match_operand:MO 0 "nonimmediate_operand" "=<r>m,<r>m")
              (any_shift:MO (match_operand:MO 1 "nonimmediate_operand" "0,0")
                            (match_operand:QI 2 "nonmemory_operand" "K,CI")))
         (clobber (reg:CC CC_REG))]
...

(It uses code and mode macros to get all shifts and rotates in both QImode
and HImode in just one pattern.)
"C" is my constraint letter for %cl. What exactly is the problem you were
having?

The only problem I see is that gcc only uses the HImode version, even when
given something like:

unsigned char a, b, c;
a = b << c;

I have not yet tried to find out why.

> Now I'm on the multiplication patterns, which are widening, for which I
> have:
[snip]
> The "a" register in SImode would in fact be the %dx:%ax pair.  I
> suppose I could introduce *yet another* constraint letter and yet
> another class that would contain all of %ax and %dx, but would be used
> only for forcing (reg:SI 0 [ al ]).

That will work. I have "e" (think of %eax) for that purpose.

[snip patches]
> Of course these patches almost certainly only appear to fix my
> *immediate* problem.  "The problem" being that I want to be able to tell
> GCC two different things: "I want %dx to be part of an SImode group in
> class AXDXREGS" and "but only %al is useable as an operand".  Any ideas?

I don't think I understand what the problem is. If all you want is an SImode
register starting at %al, then simply specify SImode and the contraint letter
for AXDXREGS.

Best regards,
Rask Ingemann Lambertsen