Re: ARM spurious load

[Jim Wilson <wilson at specifix dot com>]

Shaun Jackman wrote:
> The following code snippet produces code that loads a register, r5,
> from memory, but never uses the value.

You can report things like this into our bugzilla database, marking them 
as enhancement requests.  We don't keep track of issues reported to the 
gcc list.

I took a quick look.  The underlying problem is that the arm.md file has 
an iordi3 pattern, which gets split late, preventing us from recognizing 
some optimization chances here.  If I just disable the iordi3 pattern, 
then I get much better code.
        ldr     r0, .L3
        mov     r1, r0, asr #31
        orr     r1, r1, #34603008
        @ lr needed for prologue
        bx      lr
Disabling this pattern may result in worse code for other testcases 
though.  It was presumably added for a reason.
--
Jim Wilson, GNU Tools Support, http://www.specifix.com