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Re: insv vs one-bit fields
- From: DJ Delorie <dj at redhat dot com>
- To: schlie at comcast dot net
- Cc: rth at redhat dot com, gcc at gcc dot gnu dot org
- Date: Sun, 4 Sep 2005 20:48:05 -0400
- Subject: Re: insv vs one-bit fields
- References: <BF40D92D.B634%schlie@comcast.net>
> As it would seem that as HW control/I/O registers are often
> typically mapped into a processor's data memory address space,
> they may be correspondingly addressable via a read/mask/write as
> any N bit field may be?
In the case of the m32c, it has a *lot* of single-bit I/O ports, and
an entire category of single-bit-operand instructions to access them
efficiently, including bit set, clear, test, test-and-set,
test-and-clear, invert, etc. Those opcodes even have a special
addressing mode to make accessing the I/O space more efficient
(smaller opcodes, less insn fetches, etc) and can uniquely address any
*single* bit in the first 8192 bytes (yes, the address registers are
bit offsets for those insns!)
And, of course, they're all volatile.