This is the mail archive of the gcc@gcc.gnu.org mailing list for the GCC project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

Re: does the instruction combiner regards (foo & 0xff) as a special case?


But I found they fails to match

if(foo & 0xff) and if(foo & 0xffff)

These get simplified to foo.


Look at the debugging dump before the combine pass to see what you
need to match.

It doesn't work that way. What you get from there are only the insn numbers.


Then you run cc1 (or whatever languiage-specific compiler you use) under
gdb control, with a breakpoint on the point in try_combine - in this case,
before the first recog_for_combine call - with a condition to match the
insn numbers.  E.g. for breakpoint 5, to match any combination that ends
in insn 42,
you say:

cond 5 i3->u.fld[0].rt_int == 42

to match a combination of insns 40, 41 and 42 (and only in exactly that
order):

cond 5 i3->u.fld[0].rt_int == 42 && i2->u.fld[0].rt_int == 41 && i1 && i1->u.fld[0].rt_int == 40

or for an older codebase:

i3->fld[0].rtint == 42 && i2->fld[0].rtint == 41 && i1 && i1->fld[0].rtint == 40



Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]