%dil in x86 inline asm

[Phil Endecott <spam_from_gcc at chezphil dot org>]

Dear GCC experts,

I'm having trouble compiling code that uses the following macro from the 
Apache Portable Runtime:

#define apr_atomic_cas(mem,with,cmp) \
({ apr_atomic_t prev; \
    asm volatile ("lock; cmpxchgl %1, %2"              \
         : "=a" (prev)               \
         : "r" (with), "m" (*(mem)), "0"(cmp) \
         : "memory"); \
    prev;})

It seems that on some machines it tries to use the AMD64 register %dil, 
which does not exist on a regular x86 machine, and gives an assembler error.

I've found bug 10153 and its duplicates which seem to be describing 
essentially the same thing, but say that the input is invalid because it 
uses "r" rather than "q".  I don't know enough about x86 to understand 
this; presumably only certain registers can be used with this 
instruction, or something.

However, naively, I'd argue that it is never right for gcc to use a 
register that doesn't exist on the target architecture.  Can someone 
justify its behaviour?  If the input is illegal surely it should 
generate an error.

Can you suggest how Apache should correct this code?

(I should explain that I have not seen this error first-hand myself. 
I'm the author of a GPL program, Anyterm, and have had this error 
reported by other users.  I'm therefore "debugging at a distance".  The 
platform that causes the problems is Mandrake 10.1.  I'm afraid I don't 
even know what version of gcc it has.)


Thanks for any suggestions.

--Phil.