This is the mail archive of the gcc@gcc.gnu.org mailing list for the GCC project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

Re: Another problem with PIC port, too many reloads for insn


Robert Baruch wrote:
find_reloads for the insn computes five reloads:
...

Try "print debug_reload()". This is a much easier way to print this info.


Later on, in find_reload_regs for this instruction, the reload order
is determined to be 0, 4, 1, 2, 3. Reload 0 snags the W register, and
of course reload 4 fails and causes GCC to abort, complaining that it
cannot find a spill register because the W register required for
reload 4 is already used.

You need more registers to make gcc work. My recollection is that you need at least 3 registers in order to make reload work, but it has been a while since I've worked with a register limited target.


A common trick for microcontrollers is to use part of memory as a register set. For instance, targets that can easily access zero page memory can define a set of 8 registers in zero page memory. And once you have 8 registers, reload will work fine. Since you listed constant as a valid address, this should work for you.

The code you get will be terrible, as it will be full of moves to/from zero page memory "registers", but at least it will work.

You said that you deliberately left out reg+offset addressing modes. You will get fewer reloads if you allow that, and that may be enough to get reload working. You might need to allow it even if it gives poor code, as poor code is better than no code.
--
Jim Wilson, GNU Tools Support, http://www.SpecifixInc.com



Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]