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Re: How to handle subreg(mem(X)) after reload?
On Sat, 15 Jan 2005 16:22:50 -0500, Robert Baruch <email@example.com> wrote:
> However, now gcc fails even earlier, not recognizing this insn, during
> ../../Desktop/gcc-3.4.3/gcc/libgcc2.c:468: error: unrecognizable insn:
> (insn:HI 47 46 51 0 ../../Desktop/gcc-3.4.3/gcc/libgcc2.c:460 (set:QI
> (mem:QI (reg:QI 51 FSR) [0 S1 A8])
> (reg:QI 72)) -1 (insn_list 45 (insn_list 46 (nil)))
> (expr_list:REG_DEAD (reg:QI 51 FSR)
> (expr_list:REG_EQUAL (const_int 0 [0x0])
Hate answering my own email... means I didn't do enough work when I
wrote the original. Then again, given enough work... well.
Anyway, I found the problem. I had forgotten that the FSR register is
a valid memory address, as is POST_INC (FSR). So I added that to
GO_IF_LEGITIMATE_ADDRESS, and we got past that problem.
However, I have a question about base registers. You have to define,
in port.h, the acceptable base registers in strict and nonstrict
modes. Forget about nonstrict since that would accept any pseudo
without a hard register. For strict base pointers, does that mean that
there must exist, at a minimum, an addressing mode where base + offset
is valid? My concern is that my processor does not have a base +
offset addressing mode... only a "base" addressing mode. Any offsets
or scales have to be computed first, then the final address is passed
to the FSR register, which can then be used to address the memory.
1. Does that mean FSR should be the only allowable base register?
2. Or is FSR disqualified as a base register because there is no
addressing mode for FSR + offset?
3. Will I run into trouble if I have only one allowable strict base register?
4. Or should I allow a few other registers and fix up the code to only
use FSR later?
Thanks for any help!