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TMS320C54x Port
- From: Jonathan Bastien-Filiatrault <joe at dastyle dot net>
- To: GCC Mailing List <gcc at gcc dot gnu dot org>
- Date: Fri, 07 Jan 2005 10:17:18 -0500
- Subject: TMS320C54x Port
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Hello to everyone on the list,
Since there was no code released from the sourceforge project
(http://sourceforge.net/projects/tic54x-gcc), i got caugth up in writing
my own code. I soon realized that I was not skilled enough and did not
have enough time to make this work (properly). I got this code to
compile and (barely, sometimes) generate (incorrect) assembler code.
Some of you may find this amusing (read pathetic), but if we can make
this project work together it will be a great accomplishment. I am more
than willing to contribute to this project, I am missing a lot of GCC
hacking experience and I hope somebody on this list is willing to help.
Anyway here is the code, it is a patch against GCC 3.3.5, it should be
easely enough converted to the latest CVS version.
Legal note: I am more than willing to hand over the copyright of these
files to the FSF for eventual inclusion in GCC.
Please CC me, I am not subscribed to the list.
Cheers, Jonathan
diff -uprN gcc-3.3.5/configure.in gcc-3.3.5.mod/configure.in
- --- gcc-3.3.5/configure.in 2004-01-02 09:09:48.000000000 -0500
+++ gcc-3.3.5.mod/configure.in 2004-12-27 17:43:30.000000000 -0500
@@ -368,7 +368,7 @@ case "${target}" in
~ noconfigdirs="$noconfigdirs ${libstdcxx_version} target-libgloss
${libgcj}"
~ ;;
~ c54x*-*-* | tic54x-*-*)
- - noconfigdirs="$noconfigdirs ${libstdcxx_version} target-libgloss
${libgcj} gcc gdb newlib"
+ noconfigdirs="$noconfigdirs ${libstdcxx_version} target-libgloss
${libgcj} gdb newlib"
~ ;;
~ cris-*-*)
~ noconfigdirs="$noconfigdirs ${libgcj}"
diff -uprN gcc-3.3.5/gcc/config/tic54x/tic54x.c
gcc-3.3.5.mod/gcc/config/tic54x/tic54x.c
- --- gcc-3.3.5/gcc/config/tic54x/tic54x.c 1969-12-31 19:00:00.000000000
-0500
+++ gcc-3.3.5.mod/gcc/config/tic54x/tic54x.c 2005-01-07
09:33:39.667912528 -0500
@@ -0,0 +1,275 @@
+/* GCC port for the TMS320C54x
+/* Copyright (C) 2005 Jonathan Bastien-Filiatrault */
+
+/* This program is free software; you can redistribute it and/or */
+/* modify it under the terms of the GNU General Public License */
+/* as published by the Free Software Foundation; either version 2 */
+/* of the License, or (at your option) any later version. */
+
+/* This program is distributed in the hope that it will be useful, */
+/* but WITHOUT ANY WARRANTY; without even the implied warranty of */
+/* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the */
+/* GNU General Public License for more details. */
+
+/* You should have received a copy of the GNU General Public License */
+/* along with this program; if not, write to the Free Software */
+/* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
02111-1307, USA. */
+
+#include "config.h"
+#include "system.h"
+#include "rtl.h"
+#include "tree.h"
+#include "regs.h"
+#include "hard-reg-set.h"
+#include "basic-block.h"
+#include "real.h"
+#include "insn-config.h"
+#include "insn-attr.h"
+#include "conditions.h"
+#include "output.h"
+#include "function.h"
+#include "expr.h"
+#include "optabs.h"
+#include "libfuncs.h"
+#include "flags.h"
+#include "loop.h"
+#include "recog.h"
+#include "c-tree.h"
+#include "ggc.h"
+#include "cpplib.h"
+#include "toplev.h"
+#include "tm_p.h"
+#include "target.h"
+#include "target-def.h"
+
+/* Static Functions */
+static void tic4x_globalize_label(FILE *stream, const char *name);
+
+#undef TARGET_ASM_GLOBALIZE_LABEL
+#define TARGET_ASM_GLOBALIZE_LABEL tic4x_globalize_label
+
+struct gcc_target targetm = TARGET_INITIALIZER;
+
+int
+tic54x_get_reg_size(regno)
+ int regno;
+{
+ int retval;
+
+ if(regno <= B_REGNO)
+ retval = 5;
+ else
+ retval = 2;
+
+ return retval;
+}
+
+void
+tic54x_init_cumulative_args(cum, fntype, libname)
+ CUMULATIVE_ARGS *cum;
+ tree fntype;
+ rtx libname;
+{
+ char test[100];
+ if(libname)
+ fprintf(stderr, "Lib: %s\n", XSTR(libname, 0));
+ cum->numargs = 0;
+}
+
+/* If this is the first argument, we pass
+ it in the first accumulator */
+struct rtx_def*
+tic54x_function_arg(cum, mode, type, named)
+ CUMULATIVE_ARGS *cum;
+ enum machine_mode mode;
+ tree type;
+ int named;
+{
+ if(type == void_type_node)
+ return 0;
+ else if(named && cum->numargs == 0 && (mode == HImode || mode == SImode) )
+ return gen_rtx_REG(mode, A_REGNO);
+ else
+ return NULL_RTX;
+}
+
+void
+tic54x_function_arg_advance(cum, mode, type, named)
+ CUMULATIVE_ARGS *cum;
+ enum machine_mode mode;
+ tree type;
+ int named;
+{
+ cum->numargs++;
+}
+
+enum reg_class
+tic54x_regno_reg_class(regno)
+ int regno;
+{
+
+ const unsigned int classes[][1] = REG_CLASS_CONTENTS;
+ int i;
+ unsigned int mask = 1 << regno;
+
+ for(i=0; i < N_REG_CLASSES; i++) {
+ if(classes[i][0] & mask) {
+ return i;
+ }
+ }
+ return ALL_REGS;
+}
+
+static void
+tic4x_globalize_label(stream, name)
+ FILE *stream;
+ const char *name;
+{
+ /* default_globalize_label (stream, name); */
+ /* c4x_global_label (name); */
+}
+
+int
+tic54x_check_legit_addr(mode, addr, strict)
+ enum machine_mode mode;
+ rtx addr;
+ int strict;
+{
+ rtx base = NULL_RTX;
+
+ if(mode != HImode && mode != SImode)
+ return 0;
+
+ if(GET_MODE(addr) != HImode)
+ return 0;
+
+ switch(GET_CODE(addr)) {
+ case REG:
+ if(strict && IS_PSEUDO_REGNO(REGNO(addr)))
+ return 0;
+ base = addr;
+ break;
+ case CONST:
+ case LABEL_REF:
+ case SYMBOL_REF:
+ case CONST_INT:
+ return 1;
+ case MEM:
+ case PLUS:
+ return 0;
+ break;
+ default:
+ return 0;
+ }
+
+ if(base != NULL_RTX)
+ return 1;
+ return 0;
+}
+
+int
+tic54x_hard_regno_mode_ok(regno, mode)
+ unsigned int regno;
+ enum machine_mode mode;
+{
+ int retval;
+
+ if(mode == CCmode)
+ retval = 1;
+ else
+ retval = GET_MODE_SIZE(mode) <= tic54x_get_reg_size(regno) ? 1 : 0;
+
+ return retval;
+}
+
+int
+tic54x_hard_regno_nregs(regno, mode)
+ unsigned int regno;
+ enum machine_mode mode;
+{
+ int modesize = GET_MODE_SIZE(mode);
+ int regsize;
+ int nregs;
+
+ if(IS_ACC_REGNO(regno)) {
+ regsize = 5;
+ } else {
+ regsize = 2;
+ }
+
+ nregs = (modesize + regsize - 1) / regsize;
+ return nregs;
+}
+
+void
+tic54x_print_operand(stream, exp, letter)
+ FILE *stream;
+ rtx exp;
+ char letter;
+{
+ rtx mem;
+ switch(GET_CODE(exp)) {
+ case REG:
+ fprintf(stream, "%s", reg_names[REGNO(exp)]);
+ break;
+ case PLUS:
+ abort();
+ break;
+ case CONST_INT:
+ fprintf(stream, "%d", XINT(exp, 0));
+ break;
+ case MEM:
+ mem = XEXP(exp, 0);
+ switch(GET_CODE(mem)) {
+ case LABEL_REF:
+ case SYMBOL_REF:
+ fprintf(stream, "%s", XSTR(mem, 0));
+ break;
+ case REG:
+ fprintf(stream, "*%s", reg_names[REGNO(mem)]);
+ break;
+ default:
+ fprintf(stream, "<mem>");
+ }
+
+ break;
+ default:
+ fprintf(stream, "<ni>");
+ }
+}
+
+void
+tic54x_override_options()
+{
+/* memset(real_format_for_mode, 0, sizeof(real_format_for_mode)); */
+ real_format_for_mode[SFmode - QFmode] = &ieee_single_format;
+/* real_format_for_mode[HFmode - QFmode] = &ieee_single_format; */
+}
+
+/* tic54x_expand_epilogue() */
+/* { */
+
+/* Determines if value is a valid dual-operand memory reference */
+int
+tic54x_xmem_p(value)
+ rtx value;
+{
+ if(GET_CODE(value) == MEM
+ && GET_CODE(XEXP(value, 0)) == REG
+ && IS_XMEM_REG(XEXP(value, 0))) {
+ return 1;
+ } else {
+ return 0;
+ }
+}
+
+int
+mmr_operand (op, mode)
+ register rtx op;
+ enum machine_mode mode ATTRIBUTE_UNUSED;
+{
+ if(mode == HImode && GET_CODE(op) == REG && IS_MMR_REG(op))
+ return 1;
+ else
+ return 0;
+}
diff -uprN gcc-3.3.5/gcc/config/tic54x/tic54x.h
gcc-3.3.5.mod/gcc/config/tic54x/tic54x.h
- --- gcc-3.3.5/gcc/config/tic54x/tic54x.h 1969-12-31 19:00:00.000000000
-0500
+++ gcc-3.3.5.mod/gcc/config/tic54x/tic54x.h 2005-01-07
09:33:39.668912953 -0500
@@ -0,0 +1,323 @@
+/* GCC port for the TMS320C54x
+/* Copyright (C) 2005 Jonathan Bastien-Filiatrault */
+
+/* This program is free software; you can redistribute it and/or */
+/* modify it under the terms of the GNU General Public License */
+/* as published by the Free Software Foundation; either version 2 */
+/* of the License, or (at your option) any later version. */
+
+/* This program is distributed in the hope that it will be useful, */
+/* but WITHOUT ANY WARRANTY; without even the implied warranty of */
+/* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the */
+/* GNU General Public License for more details. */
+
+/* You should have received a copy of the GNU General Public License */
+/* along with this program; if not, write to the Free Software */
+/* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
02111-1307, USA. */
+
+#define BITS_BIG_ENDIAN 1
+#define BYTES_BIG_ENDIAN 1
+#define WORDS_BIG_ENDIAN 1
+#define UNITS_PER_WORD 2
+#define DEFAULT_SIGNED_CHAR 1
+#define FUNCTION_BOUNDARY 16
+#define BIGGEST_ALIGNMENT 16
+#define STRICT_ALIGNMENT 1
+#define PARM_BOUNDARY 16
+#define STACK_BOUNDARY 16
+#define FUNCTION_MODE HImode
+#define MOVE_MAX 2
+#define MAX_REGS_PER_ADDRESS 1
+#define TARGET_FLOAT_FORMAT IEEE_FLOAT_FORMAT
+/* #define OVERRIDE_OPTIONS tic54x_override_options() */
+
+#define INT_TYPE_SIZE 16
+#define LONG_TYPE_SIZE 32
+#define CHAR_TYPE_SIZE 16
+#define FLOAT_TYPE_SIZE 32
+#define DOUBLE_TYPE_SIZE 64
+
+/* Accumulators */
+#define A_REGNO 0
+#define B_REGNO 1
+
+/* Auxiliary Registers */
+#define AR0_REGNO 2
+#define AR1_REGNO 3
+#define AR2_REGNO 4
+#define AR3_REGNO 5
+#define AR4_REGNO 6
+#define AR5_REGNO 7
+#define AR6_REGNO 8
+#define AR7_REGNO 9
+
+/* Data Page Register */
+#define DP_REGNO 10
+
+/* Stack Pointer */
+#define SP_REGNO 11
+
+/* Status Registers */
+#define ST0_REGNO 12
+#define ST1_REGNO 13
+
+/* Block repeat counter */
+#define BRC_REGNO 14
+
+/* Shift register */
+#define T_REGNO 15
+
+#define HARD_REGNO_NREGS(REGNO, MODE) \
+ tic54x_hard_regno_nregs(REGNO, MODE)
+
+#define HARD_REGNO_MODE_OK(REGNO, MODE) \
+ tic54x_hard_regno_mode_ok(REGNO, MODE)
+
+#define CLASS_MAX_NREGS(CLASS, MODE) \
+((CLASS) == ACC_REGS ) ? ((GET_MODE_SIZE((MODE)) + 1) / 5) \
+ :( (GET_MODE_SIZE((MODE)) + 1) / 2)
+
+#define FIRST_PSEUDO_REGISTER 16
+
+#define MAX_FIXED_MODE_SIZE 16
+
+#define REGISTER_NAMES \
+ { "a", "b", "ar0", "ar1", "ar2", "ar3", "ar4", "ar5", \
+ "ar6", "ar7", "dp", "sp", "st0", "st1", "brc", "t" }
+
+#define FIXED_REGISTERS \
+ /* a b ar0 ar1 ar2 ar3 ar4 ar5 */ \
+ { 0, 0, 0, 0, 0, 0, 0, 0, \
+ /* ar6 ar7 dp sp st0 st1 brc t */ \
+ 0, 0, 1, 1, 1, 1, 1, 1 }
+
+#define CALL_USED_REGISTERS \
+ /* a b ar0 ar1 ar2 ar3 ar4 ar5 */ \
+ { 0, 0, 0, 1, 1, 1, 0, 0, \
+ /* ar6 ar7 dp sp st0 st1 brc t */ \
+ 1, 1, 1, 1, 1, 1, 1, 1 }
+
+#define REG_ALLOC_ORDER \
+ { A_REGNO, B_REGNO, AR0_REGNO, AR2_REGNO, AR3_REGNO, AR4_REGNO,
AR5_REGNO, \
+ AR1_REGNO, AR6_REGNO, AR7_REGNO }
+
+#define IS_PSEUDO_REGNO(r) ((r) >= FIRST_PSEUDO_REGISTER)
+#define IS_XMEM_REGNO(r) (((r) - AR2_REGNO) <= (AR5_REGNO - AR2_REGNO))
+#define IS_MMR_REGNO(r) (((r) - AR0_REGNO) <= (T_REGNO - AR0_REGNO))
+#define IS_AUX_REGNO(r) (((r) - AR0_REGNO) <= (AR7_REGNO - AR0_REGNO))
+#define IS_ACC_REGNO(r) (((r) - A_REGNO) <= (B_REGNO - A_REGNO))
+#define IS_INT_REGNO(r) (IS_AUX_REGNO(r) || IS_ACC_REGNO(r))
+#define IS_ST_REGNO(r) (((r) - ST0_REGNO) <= (ST1_REGNO - ST0_REGNO))
+#define IS_SP_REGNO(r) ((r) == SP_REGNO)
+
+#define IS_PSEUDO_REG(x) (IS_PSEUDO_REGNO(REGNO(x)))
+#define IS_XMEM_REG(x) (IS_XMEM_REGNO(REGNO(x)))
+#define IS_MMR_REG(x) (IS_MMR_REGNO(REGNO(x)))
+#define IS_AUX_REG(x) (IS_AUX_REGNO(REGNO(x)))
+#define IS_ACC_REG(x) (IS_ACC_REGNO(REGNO(x)))
+#define IS_INT_REG(x) (IS_INT_REGNO(REGNO(x)))
+#define IS_ST_REG(x) (IS_ST_REGNO(REGNO(x)))
+#define IS_SP_REG(x) (IS_SP_REGNO(REGNO(x)))
+
+#define IS_INT3_CONST(VAL) (((VAL) >= 0) && ((VAL) <= 7)) /* 'I' */
+#define IS_INT5_CONST(VAL) (((VAL) >= -16) && ((VAL) <= 15)) /* 'J' */
+#define IS_INT9_CONST(VAL) (((VAL) >= 0) && ((VAL) <= 511)) /* 'K' */
+#define IS_SHFT_CONST(VAL) (((VAL) >= 0) && ((VAL) <= 15)) /* 'L' */
+#define IS_SHIFT_CONST(VAL) (IS_INT5_CONST(VAL)) /* 'M' */
+
+#define CONST_OK_FOR_LETTER_P(VAL, C) \
+ ( ((C) == 'I') ? (IS_INT3_CONST(VAL)) \
+ : ((C) == 'J') ? (IS_INT5_CONST(VAL)) \
+ : ((C) == 'K') ? (IS_INT9_CONST(VAL)) \
+ : ((C) == 'L') ? (IS_SHFT_CONST(VAL)) \
+ : ((C) == 'M') ? (IS_SHIFT_CONST(VAL)) \
+ : 0)
+
+enum reg_class {
+ NO_REGS,
+ ACC_REGS, /* 'a' */
+ SP_REG, /* 'b' */
+ MMR_REGS, /* 'c' */
+ XMEM_REGS, /* 'd' */
+ AUX_REGS, /* 'x' */
+ ST_REGS, /* 'y' */
+ DP_REG, /* 'z' */
+ GENERAL_REGS, /* 'r' */
+ ALL_REGS,
+ LIM_REG_CLASSES
+};
+
+#define REG_CLASS_NAMES \
+{ \
+ "No registers", \
+ "Accumulators", \
+ "Stack P", \
+ "MMR Regs", \
+ "Xmem Regs", \
+ "Aux", \
+ "Status", \
+ "Data Page", \
+ "General", \
+ "All regs" \
+}
+
+#define N_REG_CLASSES (int)LIM_REG_CLASSES
+
+#define REG_CLASS_CONTENTS \
+{ \
+ {0x0000}, /* No registers */ \
+ {0x0003}, /* 'a' Accumulators */ \
+ {0x0800}, /* 'b' Stack pointer */ \
+ {0xfffc}, /* 'c' Memory Mapped Registers */ \
+ {0x0078}, /* 'd' Indirect Xmem */ \
+ {0x03fc}, /* 'x' Auxiliary Registers */ \
+ {0X3000}, /* 'y' Status Registers */ \
+ {0X0400}, /* 'z' Data Page Register */ \
+ {0x03ff}, /* 'r' General registers */ \
+ {0xffff}, /* All registers */ \
+}
+
+
+/*
+ Register constraints for the C54x
+
+ a - Accumulator registers (a-b)
+ b - Stack register (sp)
+ c - Memory-mapped registers (ar0-ar7,sp,dp,brc,t)
+ d - Registers valid for dual-operand indirect addressing (ar2-ar5)
+ r - General Registers (a-b,ar0-ar7)
+ x - Auxiliary (address registers) (ar0-ar7)
+ y - Status registers (st0-st1)
+ z - Data page register (dp)
+*/
+
+#define REG_CLASS_FROM_LETTER(CC) \
+ ( ((CC) == 'a') ? ACC_REGS \
+ : ((CC) == 'b') ? SP_REG \
+ : ((CC) == 'c') ? MMR_REGS \
+ : ((CC) == 'd') ? XMEM_REGS \
+ : ((CC) == 'x') ? AUX_REGS \
+ : ((CC) == 'y') ? ST_REGS \
+ : NO_REGS )
+
+#define EXTRA_CONSTRAINT(VALUE, CC) \
+ ( ((CC) == 'D') ? tic54x_xmem_p(VALUE) \
+ : 0 )
+
+#define STACK_POINTER_REGNUM SP_REGNO
+#define FRAME_POINTER_REGNUM AR7_REGNO
+#define ARG_POINTER_REGNUM AR6_REGNO
+#define Pmode HImode
+#define FUNCTION_ARG_REGNO_P(REGNO) (REGNO == A_REGNO)
+#define RETURN_POPS_ARGS(FUNCDECL, FUNTYPE, STACK_SIZE) 0
+#define LEGITIMATE_CONSTANT_P(X) 1
+#define STRUCT_VALUE_REGNUM A_REGNO
+#define CONSTANT_ADDRESS_P(X) CONSTANT_P(X)
+
+#ifndef REG_OK_STRICT
+# define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR)\
+ {if(tic54x_check_legit_addr(MODE, X, 0)) goto ADDR;}
+#else
+# define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR)\
+ {if(tic54x_check_legit_addr(MODE, X, 1)) goto ADDR;}
+#endif
+
+#define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
+ GO_IF_LEGITIMATE_ADDRESS(MODE, X, WIN)
+#define SLOW_BYTE_ACCESS 0
+#define CASE_VECTOR_MODE HImode
+#define ASM_APP_ON "#APP"
+#define ASM_APP_OFF "#NO_APP"
+#define FRAME_POINTER_REQUIRED 0
+#define STACK_GROWS_DOWNWARD
+#define FRAME_GROWS_DOWNWARD
+#define ARGS_GROW_DOWNWARD
+#define STARTING_FRAME_OFFSET 1
+#define FIRST_PARM_OFFSET(FUNCDECL) 0
+#define TRAMPOLINE_SIZE 2
+#define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL) {;}
+#define BASE_REG_CLASS AUX_REGS
+#define INDEX_REG_CLASS AUX_REGS
+
+#define TARGET_SWITCHES {{"", TARGET_DEFAULT, ""}}
+#define TARGET_DEFAULT 0
+
+#define TEXT_SECTION_ASM_OP "\t.text"
+#define DATA_SECTION_ASM_OP "\t.data"
+#define READONLY_DATA_SECTION_ASM_OP "\t.sect\t\".const\""
+#define FINI_SECTION_ASM_OP "\t.sect\t\".fini\""
+
+#define ASM_OUTPUT_ALIGN(FILE, LOG) \
+ if ((LOG) != 0) \
+ fprintf (FILE, "\t.align\t%d\n", (1 << (LOG)))
+
+#define ASM_OUTPUT_SKIP(FILE, SIZE) \
+{ int c = SIZE; \
+ for(; c > 0; --c) \
+ fprintf(FILE, "\t.word\t0\n"); }
+
+#define ASM_OUTPUT_INTERNAL_LABEL(STREAM, PREFIX, NUM) \
+ fprintf(STREAM, "L%s%d:\n", PREFIX, NUM)
+
+#define ASM_GENERATE_INTERNAL_LABEL(BUFFER, PREFIX,NUM) \
+ sprintf(BUFFER, "L%s%d:\n", PREFIX, NUM)
+
+#define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
+ (assemble_name(FILE, NAME), fprintf(FILE, ":\n"))
+
+#define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
+( fputs ("\t.globl\t", FILE), \
+ fputs ("\n\t.bss\t", FILE), \
+ fprintf (FILE, ",%u\n", (ROUNDED)))
+
+#define ASM_FILE_START(STREAM) \
+ fprintf(STREAM, "\n");
+
+#define ASM_FILE_END(STREAM) \
+ fprintf(STREAM, "\n");
+
+#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT) \
+ (tic54x_init_cumulative_args(&CUM, FNTYPE, LIBNAME))
+
+#define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
+ (tic54x_function_arg(&CUM, MODE, TYPE, NAMED))
+
+#define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
+ (tic54x_function_arg_advance(&CUM, MODE, TYPE, NAMED))
+
+#define FUNCTION_VALUE(VALTYPE, FUNC) \
+ gen_rtx(REG, TYPE_MODE(VALTYPE), A_REGNO)
+
+#define LIBCALL_VALUE(MODE) \
+ gen_rtx(REG, MODE, A_REGNO)
+
+#define FUNCTION_VALUE_REGNO_P(REGNO) ((REGNO) == A_REGNO)
+
+typedef struct tic54x_args{
+ int numargs;
+} CUMULATIVE_ARGS;
+
+#define REG_OK_FOR_BASE_P(X) IS_AUX_REG(X)
+#define REGNO_OK_FOR_BASE_P(REGNO) IS_AUX_REGNO(REGNO)
+#define REG_OK_FOR_INDEX_P(X) IS_AUX_REG(X)
+#define REGNO_OK_FOR_INDEX_P(REGNO) IS_AUX_REGNO(REGNO)
+/* #define REG_OK_FOR_BASE_P(X) 0 */
+/* #define REGNO_OK_FOR_BASE_P(REGNO) 0 */
+/* #define REG_OK_FOR_INDEX_P(X) 0 */
+/* #define REGNO_OK_FOR_INDEX_P(REGNO) 0 */
+#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 0
+#define REGNO_REG_CLASS(REGNO) tic54x_regno_reg_class(REGNO)
+#define MODES_TIEABLE_P(MODE1, MODE2) 0
+#define PREFERRED_RELOAD_CLASS(X, CLASS) CLASS
+#define INITIAL_FRAME_POINTER_OFFSET(DEPTH) DEPTH
+#define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) 1
+#define PRINT_OPERAND(STREAM, X, CODE) tic54x_print_operand(STREAM, X,
CODE);
+#define PRINT_OPERAND_ADDRESS(STREAM, X) {;}
+#define INITIALIZE_TRAMPOLINE(ADDR, FNADDR, STATIC_CHAIN) {;}
+#define FUNCTION_PROFILER {;}
+/* #define HAVE_PRE_MODIFY_REG 1 */
+/* #define HAVE_POST_MODIFY_REG 1 */
+#define HAVE_PRE_INCREMENT 1
+#define HAVE_PRE_DECREMENT 1
+#define HAVE_POST_INCREMENT 1
+#define HAVE_POST_DECREMENT 1
diff -uprN gcc-3.3.5/gcc/config/tic54x/tic54x.md
gcc-3.3.5.mod/gcc/config/tic54x/tic54x.md
- --- gcc-3.3.5/gcc/config/tic54x/tic54x.md 1969-12-31 19:00:00.000000000
- -0500
+++ gcc-3.3.5.mod/gcc/config/tic54x/tic54x.md 2005-01-07
09:33:39.668912953 -0500
@@ -0,0 +1,161 @@
+; GCC port for the TMS320C54x
+; Copyright (C) 2005 Jonathan Bastien-Filiatrault
+
+; This program is free software; you can redistribute it and/or
+; modify it under the terms of the GNU General Public License
+; as published by the Free Software Foundation; either version 2
+; of the License, or (at your option) any later version.
+
+; This program is distributed in the hope that it will be useful,
+; but WITHOUT ANY WARRANTY; without even the implied warranty of
+; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+; GNU General Public License for more details.
+
+; You should have received a copy of the GNU General Public License
+; along with this program; if not, write to the Free Software
+; Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
02111-1307, USA.
+
+(define_constants [
+ (a_reg 0)
+ (b_reg 1)
+ (ar0_reg 2)
+ (ar1_reg 3)
+ (ar2_reg 4)
+ (ar3_reg 5)
+ (ar4_reg 6)
+ (ar5_reg 7)
+ (ar6_reg 8)
+ (ar7_reg 9)
+ (dp_reg 10)
+ (sp_reg 11)
+ (st0_reg 12)
+ (st1_reg 13)
+ (brc_reg 14)
+ (t_reg 15)
+])
+
+
+(define_insn "pushhi"
+ [(set (mem:HI (pre_dec:HI (reg:HI sp_reg))) (match_operand:HI 0
"general_operand" "c,am<>"))]
+ ""
+ "@
+ pushm %0
+ push %0"
+)
+
+(define_insn "pophi"
+ [(set (match_operand:HI 0 "nonimmediate_operand" "=c,am<>") (mem:HI
(post_inc:HI (reg:HI sp_reg))))]
+ ""
+ "@
+ popm %0
+ pop %0"
+)
+
+(define_insn "nop"
+ [(const_int 0)]
+ ""
+ "nop"
+)
+
+(define_insn "jump"
+ [(set (pc) (label_ref (match_operand 0 "" "")))]
+ ""
+ "bunc %0"
+)
+
+(define_expand "indirect_jump"
+ [(set (pc) (match_operand:HI 0 "register_operand" "a"))]
+ ""
+ ""
+)
+
+(define_insn "call"
+ [(call (match_operand:HI 0 "general_operand" "mi") (match_operand:HI 1
"general_operand" "g"))]
+ ""
+ "call %0"
+)
+
+(define_insn "call_value"
+ [(set (match_operand:HI 0 "" "=a")
+ (call (match_operand:HI 1 "general_operand" "mi") (match_operand:HI 2
"general_operand" "g")))]
+ ""
+ "callv %1"
+)
+
+(define_expand "epilogue"
+ [(const_int 1)]
+ ""
+ "emit_jump_insn(gen_return()); DONE;"
+)
+
+(define_insn "return"
+ [(return)]
+ ""
+ "ret"
+)
+
+(define_insn "cmphi"
+ [(set (cc0) (compare (match_operand:HI 0 "" "") (match_operand:HI 1 ""
"")))]
+ ""
+ "cmpm %0, %1"
+)
+
+(define_insn "addhi2"
+ [(set (match_operand:HI 0 "nonimmediate_operand" "=<>rm")
+ (plus:HI
+ (match_dup 0)
+ (match_operand:HI 1 "general_operand" "<>rmi")
+ )
+ )]
+ ""
+ "add %1,%0"
+)
+
+(define_expand "addhi3"
+ [(set (match_operand:HI 1 "nonimmediate_operand" "")
+ (plus:HI (match_dup 1) (match_operand:HI 2 "general_operand" "")))
+ (set (match_operand:HI 0 "nonimmediate_operand" "") (match_dup 1))]
+ ""
+ ""
+)
+
+(define_expand "movhi"
+ [(set (match_operand:HI 0 "nonimmediate_operand" "") (match_operand:HI
1 "general_operand" ""))]
+ ""
+ {
+ if(!reload_completed && IS_MMR_REG(operands[0]) &&
IS_MMR_REG(operands[1]))
+ emit_insn(gen_movmmr(operands[0], operands[1])); DONE;
+ }
+)
+
+(define_insn "ldsthi"
+ [(set (match_operand:HI 0 "nonimmediate_operand" "=a,a,<>m,<>m,c,c,c")
+ (match_operand:HI 1 "general_operand" "<>mia,c,i,a,i,a,c"))]
+ ""
+ "@
+ ld %1,%0
+ ldm %1,%0
+ st %1,%0
+ stl %1,%0
+ stm %1,%0
+ stlm %1,%0
+ fakest %1,%0"
+)
+
+(define_insn "ashlhi3"
+ [(set (match_operand:HI 0 "register_operand" "=a") (ashift:HI
(match_operand:HI 1 "register_operand" "a") (match_operand:HI 2
"immediate_operand" "L")))]
+ ""
+ "ashl %1,%2,%0"
+)
+
+(define_insn "ashrhi3"
+ [(set (match_operand:HI 0 "register_operand" "") (ashiftrt:HI
(match_operand:HI 1 "register_operand" "") (match_operand:HI 2
"immediate_operand" "L")))]
+ ""
+ "ashr %1,%2,%0"
+)
+
+(define_insn "lshrhi3"
+ [(set (match_operand:HI 0 "register_operand" "") (lshiftrt:HI
(match_operand:HI 1 "register_operand" "") (match_operand:HI 2
"immediate_operand" "L")))]
+ ""
+ "lshr %1,%2,%0"
+)
diff -uprN gcc-3.3.5/gcc/config/tic54x/tic54x-protos.h
gcc-3.3.5.mod/gcc/config/tic54x/tic54x-protos.h
- --- gcc-3.3.5/gcc/config/tic54x/tic54x-protos.h 1969-12-31
19:00:00.000000000 -0500
+++ gcc-3.3.5.mod/gcc/config/tic54x/tic54x-protos.h 2005-01-07
09:33:39.669913378 -0500
@@ -0,0 +1,34 @@
+/* GCC port for the TMS320C54x
+/* Copyright (C) 2005 Jonathan Bastien-Filiatrault */
+
+/* This program is free software; you can redistribute it and/or */
+/* modify it under the terms of the GNU General Public License */
+/* as published by the Free Software Foundation; either version 2 */
+/* of the License, or (at your option) any later version. */
+
+/* This program is distributed in the hope that it will be useful, */
+/* but WITHOUT ANY WARRANTY; without even the implied warranty of */
+/* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the */
+/* GNU General Public License for more details. */
+
+/* You should have received a copy of the GNU General Public License */
+/* along with this program; if not, write to the Free Software */
+/* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
02111-1307, USA. */
+
+#ifndef GCC_TIC54x_PROTOS_H
+#define GCC_TIC54x_PROTOS_H
+
+extern int tic54x_get_reg_size(int);
+
+extern void tic54x_init_cumulative_args PARAMS((CUMULATIVE_ARGS *,
tree, rtx));
+extern struct rtx_def *tic54x_function_arg PARAMS((CUMULATIVE_ARGS *,
enum machine_mode, tree, int));
+extern void tic54x_function_arg_advance PARAMS((CUMULATIVE_ARGS *, enum
machine_mode, tree, int));
+extern int tic54x_check_legit_addr PARAMS ((enum machine_mode, rtx, int));
+extern enum reg_class tic54x_regno_reg_class PARAMS((int regno));
+extern int tic54x_hard_regno_mode_ok PARAMS((unsigned int regno, enum
machine_mode mode));
+extern int tic54x_hard_regno_nregs PARAMS((unsigned int regno, enum
machine_mode mode));
+extern void tic54x_print_operand PARAMS((FILE *, rtx, int));
+extern void tic54x_override_options PARAMS((void));
+extern int tic54x_xmem_p PARAMS((rtx));
+extern int mmr_operand PARAMS((rtx, enum machine_mode));
+#endif
diff -uprN gcc-3.3.5/gcc/config.gcc gcc-3.3.5.mod/gcc/config.gcc
- --- gcc-3.3.5/gcc/config.gcc 2004-04-29 00:42:47.000000000 -0400
+++ gcc-3.3.5.mod/gcc/config.gcc 2004-12-27 17:43:08.000000000 -0500
@@ -2762,6 +2762,9 @@ xtensa-*-linux*)
~ tm_file="${tm_file} dbxelf.h elfos.h svr4.h linux.h xtensa/linux.h"
~ tmake_file="t-slibgcc-elf-ver t-linux xtensa/t-xtensa"
~ ;;
+tic54x-*)
+ true
+ ;;
~ *)
~ echo "*** Configuration $machine not supported" 1>&2
~ exit 1
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