Guidance on address expression optimization in CSE

[HutchinsonAndy at netscape dot net]

I am trying to improve on avr port and having some problems understanding how cse stage impact on memory addresses.

I want to get rtl optimization to favor indirect addressing [r??] where the address is used multiple times - rather than direct addressing in each instruction. i.e. load a register with address and use that.

The example I have been using has address of operand at address 122.
I have figured out how to get memory costs right to prefer [Rnn] form - where Rnn=122. Indeed rtx_cost also favor the arrangement.

In all cases, the memory address costs are 4 for [Rnn] and 2 for [122]. And the rtx expression cost of MEM:[122]=8 and MEM:[Rnn]=4.

As expected the initial RTL shows RTL loading register with the address and then using indirect form as operand. Apart from psuedo register number, the RTL is identical in each instance.

What I was expecting to happen was that cse.c would identify the common usage and appropriately combined them. Ideally, loading Rnn=122 once and using [Rnn].

However, the cse pass code actually turns each of these instances into direct addressing by replacment with the constant value (122) and elimination of the associated register - as reported in .c.gcse

I am struggling here to understand "find_best_addr()" but it would appear at first glance that if both the memory cost and rtx cost of two address expressions are equal, no replacment occurs. 

So all the separate - yet equivalent expressions are retained.

Maybe I'm looking in wrong place, but I cant find another mechanism where this should occur or what other criteria I may be missing to make this happen.

BR


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