--- ../gcc_cvs/gcc/gcc/config/m68k/m68k.h 2004-03-10 10:37:14.000000000 +0530 +++ ../gcc-3.4.0/gcc/config/m68k/m68k.h 2004-11-03 18:31:48.000000000 +0530 @@ -92,6 +92,10 @@ builtin_define ("__mcf5400__"); \ builtin_define ("__mcf5407__"); \ } \ + if (TARGET_CFV4E) \ + { \ + builtin_define ("__mcfv4e__"); \ + } \ if (TARGET_CF_HWDIV) \ builtin_define ("__mcfhwdiv__"); \ if (flag_pic) \ @@ -226,12 +230,18 @@ #define MASK_ID_SHARED_LIBRARY (1<<18) #define TARGET_ID_SHARED_LIBRARY (target_flags & MASK_ID_SHARED_LIBRARY) +/* Compile for CFV4E */ + +#define MASK_CFV4E (1<<19) +#define TARGET_CFV4E (target_flags & MASK_CFV4E) + + /* Compile for a CPU32. A 68020 without bitfields is a good heuristic for a CPU32. */ #define TARGET_CPU32 (TARGET_68020 && !TARGET_BITFIELD) /* Is the target a ColdFire? */ -#define MASK_COLDFIRE (MASK_5200|MASK_528x|MASK_CFV3|MASK_CFV4) +#define MASK_COLDFIRE (MASK_5200|MASK_528x|MASK_CFV3|MASK_CFV4|MASK_CFV4E) #define TARGET_COLDFIRE (target_flags & MASK_COLDFIRE) /* Which bits can be set by specifying a ColdFire */ @@ -265,7 +275,7 @@ { "noshort", - MASK_SHORT, \ N_("Consider type `int' to be 32 bits wide") }, \ { "68881", MASK_68881, "" }, \ - { "soft-float", - (MASK_68040_ONLY|MASK_68881), \ + { "soft-float", - (MASK_CFV4E|MASK_68040_ONLY|MASK_68881), \ N_("Generate code with library calls for floating point") }, \ { "68020-40", -(MASK_ALL_CF_BITS|MASK_68060|MASK_68040_ONLY), \ N_("Generate code for a 68040, without any new instructions") }, \ @@ -305,6 +315,10 @@ |MASK_BITFIELD|MASK_68881), \ N_("Generate code for a 5407") }, \ { "5407", (MASK_CFV4|MASK_CF_HWDIV), "" }, \ + { "cfv4e", - (MASK_ALL_CF_BITS|MASK_68060|MASK_68040 \ + |MASK_68040_ONLY|MASK_68020|MASK_BITFIELD|MASK_68881),\ + N_("Generate code for a ColdFire CFV4E") }, \ + { "cfv4e", (MASK_CFV4|MASK_CF_HWDIV|MASK_CFV4E), "" }, \ { "68851", 0, \ N_("Generate code for a 68851") }, \ { "no-68851", 0, \ @@ -386,7 +400,7 @@ /* target machine storage layout */ /* Define for XFmode extended real floating point support. */ -#define LONG_DOUBLE_TYPE_SIZE 96 +#define LONG_DOUBLE_TYPE_SIZE 96 /*(TARGET_CFV4E ? 64 : 96) */ /* Set the value of FLT_EVAL_METHOD in float.h. When using 68040 fp instructions, we get proper intermediate rounding, otherwise we @@ -524,7 +538,7 @@ { \ int i; \ HARD_REG_SET x; \ - if (! TARGET_68881) \ + if (! (TARGET_68881|TARGET_CFV4E)) \ { \ COPY_HARD_REG_SET (x, reg_class_contents[(int)FP_REGS]); \ for (i = 0; i < FIRST_PSEUDO_REGISTER; i++ ) \ @@ -548,6 +562,13 @@ ((REGNO) >= 16 ? GET_MODE_NUNITS (MODE) \ : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)) +/* A C expression that is nonzero if hard register NEW_REG can be + considered for use as a rename register for OLD_REG register. */ + +#define HARD_REGNO_RENAME_OK(OLD_REG, NEW_REG) \ + m68k_hard_regno_rename_ok (OLD_REG, NEW_REG) + + /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. On the 68000, the cpu registers can hold any mode but the 68881 registers can hold only SFmode or DFmode. */ @@ -558,7 +579,8 @@ || ((REGNO) >= 16 && (REGNO) < 24 \ && (GET_MODE_CLASS (MODE) == MODE_FLOAT \ || GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT) \ - && GET_MODE_UNIT_SIZE (MODE) <= 12)) + && GET_MODE_UNIT_SIZE (MODE) <= 12) \ + && !(MODE == XFmode && TARGET_CFV4E)) /* Value is 1 if it is a good idea to tie two pseudo registers @@ -566,7 +588,7 @@ If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2, for any hard reg, then this must be 0 for correct output. */ #define MODES_TIEABLE_P(MODE1, MODE2) \ - (! TARGET_68881 \ + (! (TARGET_68881|TARGET_CFV4E) \ || ((GET_MODE_CLASS (MODE1) == MODE_FLOAT \ || GET_MODE_CLASS (MODE1) == MODE_COMPLEX_FLOAT) \ == (GET_MODE_CLASS (MODE2) == MODE_FLOAT \ @@ -682,7 +704,7 @@ #define REG_CLASS_FROM_LETTER(C) \ ((C) == 'a' ? ADDR_REGS : \ ((C) == 'd' ? DATA_REGS : \ - ((C) == 'f' ? (TARGET_68881 ? FP_REGS : \ + ((C) == 'f' ? ((TARGET_68881|TARGET_CFV4E) ? FP_REGS : \ NO_REGS) : \ NO_REGS))) @@ -775,7 +797,7 @@ ? DATA_REGS \ : (GET_CODE (X) == CONST_DOUBLE \ && GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) \ - ? (TARGET_68881 && (CLASS == FP_REGS || CLASS == DATA_OR_FP_REGS) \ + ? ((TARGET_68881|TARGET_CFV4E) && (CLASS == FP_REGS || CLASS == DATA_OR_FP_REGS) \ ? FP_REGS : NO_REGS) \ : (TARGET_PCREL \ && (GET_CODE (X) == SYMBOL_REF || GET_CODE (X) == CONST \ @@ -1151,11 +1173,11 @@ #else #define PCREL_GENERAL_OPERAND_OK (TARGET_PCREL) #endif - #define LEGITIMATE_PIC_OPERAND_P(X) \ - (! symbolic_operand (X, VOIDmode) \ - || (GET_CODE (X) == SYMBOL_REF && SYMBOL_REF_FLAG (X)) \ - || PCREL_GENERAL_OPERAND_OK) + ( (TARGET_CFV4E? legitimate_pic_operand_p(X) :\ + (! symbolic_operand (X, VOIDmode) \ + || (GET_CODE (X) == SYMBOL_REF && SYMBOL_REF_FLAG (X)) \ + || PCREL_GENERAL_OPERAND_OK) ) ) /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx and check its validity for a certain class. @@ -1222,9 +1244,9 @@ && GET_CODE (XEXP (X, 1)) == CONST_INT \ && (TARGET_68020 \ || ((unsigned) INTVAL (XEXP (X, 1)) + 0x8000) < 0x10000)) \ - || (GET_CODE (X) == PLUS && XEXP (X, 0) == pic_offset_table_rtx \ + ||(!TARGET_CFV4E) && (GET_CODE (X) == PLUS && XEXP (X, 0) == pic_offset_table_rtx \ && flag_pic && GET_CODE (XEXP (X, 1)) == SYMBOL_REF) \ - || (GET_CODE (X) == PLUS && XEXP (X, 0) == pic_offset_table_rtx \ + ||(!TARGET_CFV4E) && (GET_CODE (X) == PLUS && XEXP (X, 0) == pic_offset_table_rtx \ && flag_pic && GET_CODE (XEXP (X, 1)) == LABEL_REF)) #define GO_IF_NONINDEXED_ADDRESS(X, ADDR) \ @@ -1276,16 +1298,29 @@ && GET_CODE (XEXP (X, 1)) == CONST_INT \ && (INTVAL (XEXP (X, 1)) == 2 \ || INTVAL (XEXP (X, 1)) == 4 \ - || (INTVAL (XEXP (X, 1)) == 8 && !TARGET_COLDFIRE)))) + || (INTVAL (XEXP (X, 1)) == 8 && (!TARGET_COLDFIRE|TARGET_CFV4E))))) + +/* If Coldfire and float, only accept addressing modes 2-5 */ +#define GO_IF_CFV4E_LEGITIMATE_ADDRESS(MODE, X, ADDR) \ +{ if (LEGITIMATE_BASE_REG_P(X) \ + || ((GET_CODE (X) == PRE_DEC || GET_CODE (X) == POST_INC) \ + && LEGITIMATE_BASE_REG_P (XEXP (X, 0))) \ + || ((GET_CODE (X) == PLUS) && LEGITIMATE_BASE_REG_P (XEXP (X, 0)) \ + && (GET_CODE (XEXP (X, 1)) == CONST_INT) \ + && ((((unsigned) INTVAL (XEXP (X, 1)) + 0x8000) < 0x10000)))) \ + goto ADDR;} /* If pic, we accept INDEX+LABEL, which is what do_tablejump makes. */ #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \ -{ GO_IF_NONINDEXED_ADDRESS (X, ADDR); \ +{ if (TARGET_CFV4E && (GET_MODE_CLASS (MODE) == MODE_FLOAT)) \ + { GO_IF_CFV4E_LEGITIMATE_ADDRESS(MODE, X, ADDR); \ + } else { \ + GO_IF_NONINDEXED_ADDRESS (X, ADDR); \ GO_IF_INDEXED_ADDRESS (X, ADDR); \ if (flag_pic && MODE == CASE_VECTOR_MODE && GET_CODE (X) == PLUS \ && LEGITIMATE_INDEX_P (XEXP (X, 0)) \ && GET_CODE (XEXP (X, 1)) == LABEL_REF) \ - goto ADDR; } + goto ADDR; }} /* Don't call memory_address_noforce for the address to fetch the switch offset. This address is ok as it stands (see above), @@ -1321,7 +1356,9 @@ { COPY_ONCE (X); XEXP (X, 1) = force_operand (XEXP (X, 1), 0);} \ if (ch && GET_CODE (XEXP (X, 1)) == REG \ && GET_CODE (XEXP (X, 0)) == REG) \ - goto WIN; \ + { if (TARGET_CFV4E && GET_MODE_CLASS (MODE) == MODE_FLOAT) \ + { COPY_ONCE (X); X = force_operand(X, 0); goto WIN;} \ + else goto WIN; } \ if (ch) { GO_IF_LEGITIMATE_ADDRESS (MODE, X, WIN); } \ if (GET_CODE (XEXP (X, 0)) == REG \ || (GET_CODE (XEXP (X, 0)) == SIGN_EXTEND \ @@ -1332,7 +1369,10 @@ emit_move_insn (temp, val); \ COPY_ONCE (X); \ XEXP (X, 1) = temp; \ - goto WIN; } \ + if (TARGET_CFV4E && GET_MODE_CLASS (MODE) == MODE_FLOAT \ + && GET_CODE (XEXP (X, 0)) == REG) \ + X = force_operand(X, 0); \ + goto WIN; } \ else if (GET_CODE (XEXP (X, 1)) == REG \ || (GET_CODE (XEXP (X, 1)) == SIGN_EXTEND \ && GET_CODE (XEXP (XEXP (X, 1), 0)) == REG \ @@ -1342,6 +1382,9 @@ emit_move_insn (temp, val); \ COPY_ONCE (X); \ XEXP (X, 0) = temp; \ + if (TARGET_CFV4E && GET_MODE_CLASS (MODE) == MODE_FLOAT \ + && GET_CODE (XEXP (X, 1)) == REG) \ + X = force_operand(X, 0); \ goto WIN; }}} /* Go to LABEL if ADDR (a legitimate address expression) @@ -1706,7 +1749,49 @@ {"valid_dbcc_comparison_p", {EQ, NE, GTU, LTU, GEU, LEU, \ GT, LT, GE, LE}}, \ {"extend_operator", {SIGN_EXTEND, ZERO_EXTEND}}, - + +/* Additions for PIC for cfv4e */ +#define OUTPUT_ADDR_CONST_EXTRA(STREAM, X, FAIL) \ + do \ + if (GET_CODE (X) == UNSPEC && XVECLEN ((X), 0) == 1) \ + { \ + switch (XINT ((X), 1)) \ + { \ + case UNSPEC_PIC: \ + /* GLOBAL_OFFSET_TABLE or local symbols, no suffix. */ \ + output_addr_const ((STREAM), XVECEXP ((X), 0, 0)); \ + fputs ("@GOT", (STREAM)); \ + break; \ + case UNSPEC_GOT: \ + output_addr_const ((STREAM), XVECEXP ((X), 0, 0)); \ + fputs ("@GOT", (STREAM)); \ + break; \ + case UNSPEC_GOTOFF: \ + output_addr_const ((STREAM), XVECEXP ((X), 0, 0)); \ + fputs ("@GOTOFF", (STREAM)); \ + break; \ + case UNSPEC_PLT: \ + output_addr_const ((STREAM), XVECEXP ((X), 0, 0)); \ + fputs ("@PLT", (STREAM)); \ + break; \ + case UNSPEC_GOTPLT: \ + output_addr_const ((STREAM), XVECEXP ((X), 0, 0)); \ + fputs ("@GOTPLT", (STREAM)); \ + break; \ + default: \ + goto FAIL; \ + } \ + break; \ + } \ + else \ + goto FAIL; \ + while (0) + +#define SYMBOLIC_CONST(X) \ + (GET_CODE (X) == SYMBOL_REF \ + || GET_CODE (X) == LABEL_REF \ + || (GET_CODE (X) == CONST && symbolic_reference_mentioned_p (X))) + /* Local variables: version-control: t