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Re: Reducing JUMPs and using conditional exec


Hi Adrian,

Thanks for the reply.

Acctually, the architecture I have only supports conditional moves, and no other conditional operation.
I tried defining the conditional move (see end of msg) along side a definitions of 'cbranchsi4' and 'movesicc', however, it only works for simple conditional copying that dont require the computation of an intermediate value (see me previous email). I also tried, as you suggest, using 'define_cond_exec' and 'predicable' to expand all the insn with cond_exec, but that didn't help.


The problem seems as if the compiler thinks that it is always better to use jumps than using excessive moves, which is not really the case in the architecture I have.





(define_insn "*my_cond_mov"
  [(cond_exec
   (match_operator 0 "comparison_operator"
[(match_operand:SI 1 "register_operand" "r")
 (match_operand:SI 2 "register_operand" "r")])
  (set (match_operand:SI 3 "register_operand" "=r")
(match_operand:SI 4 "general_operand"  "rmIKi")
	 ) )]
  ""
  "COMP_MOV %C0,%1, %2, %3, %4, %3"
)


Regards,


Sami Khawam




Adrian Strätling wrote:
Sami Khawam wrote::



Thanks a lot Hans-Peter for the info; indeed the documentation explains it quite well, however it does not explain well how to deal with the expansion on CPU that dont have a cc0.


I wrote my diploma thesis about a processor that can execute any operation conditional. It can use several condition registers for that purpose. The key idea is the 'define_cond_exec' pattern combined with the 'predicable' attribute. You may want to look at the solution to my problem at http://rtg.informatik.tu-chemnitz.de/obj.php/da-astr.pdf?id=162&mime=application%2Fpdf


hth, Adrian Strätling



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