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Re: More on memory barriers
- From: Richard Henderson <rth at redhat dot com>
- To: Jason Merrill <jason at redhat dot com>
- Cc: Geoffrey Keating <geoffk at apple dot com>, David Edelsohn <dje at watson dot ibm dot com>, gcc at gcc dot gnu dot org, Benjamin Kosnik <bkoz at redhat dot com>
- Date: Tue, 14 Sep 2004 14:52:29 -0700
- Subject: Re: More on memory barriers
- References: <xypllfcbl1s.fsf@miranda.boston.redhat.com>
On Tue, Sep 14, 2004 at 05:25:03PM -0400, Jason Merrill wrote:
> Or is it the case on all of these targets that using a more heavyweight
> barrier (i.e. sync on PPC) invalidates speculative loads on other
> processors?
I believe that's true of all of them, yes. I know for absolute
certain it's true for the Intel architectures.
r~