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1) number of memory stores, eg. [sp+4] <- r1 2) number of memory loads, eg. r1 <- [sp+4] 3) number of combined stores and loads with addressing mode available on CISC-like architectures: eg. [sp+4] <- [sp+4] + r1, or r1 <- [sp+4] + r1 where r1 is the hardware register.
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