Re: MD representation of IA64 floating point operations

[Jim Wilson <wilson at specifixinc dot com>]

On Thu, 2004-07-22 at 18:41, Zack Weinberg wrote:
> but this requires separate patterns for every possible combination of
> operand modes - 64 patterns for a three-operand instruction like this
> one,

You don't need very many patterns for the divide/sqrt/etc expanders.

If you want to support the full generality of what the hardware
implements, then you will probably have to add some machine independent
support for this.  You are implementing something that gcc doesn't
already support, because there probably aren't any other targets that
support this.  I pointed at one possible solution, which is the
se_register_operand stuff in the gcc-3.3 mips port.  Another possible
solution is modeless patterns, perhaps with predicates that check the
operand mode instead of relying on the mode parameter.  Or maybe a new
kind of operator that can accept multiple modes.

We have some support for preprocessing md files, so you could write
macros that expand into all of the patterns you need.  We would end up
with a huge md file, but writing the source for it wouldn't be too bad.

Another possible solution is to just add patterns for RFmode, and add
patterns to convert to/from RFmode that don't emit any instructions. 
This restricts the operations available, but might be acceptable for
some applications.  This results in double-rounding problems if you have
to specify the conversion to the desired result type separately though. 
So maybe patterns that accept only RFmode operands, but have any of the
4 possible output modes.  You then only need 4 patterns per operation,
which only doubles the size of the md file.  Not nice, but avoids the
needs for any tricks or machine independent changes as described above.
-- 
Jim Wilson, GNU Tools Support, http://www.SpecifixInc.com