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Re: [PATCH] Improved target tuning in simplify-rtx.c
- From: Geert Bosch <bosch at gnat dot com>
- To: Roger Sayle <roger at eyesopen dot com>
- Cc: GCC development group <gcc at gcc dot gnu dot org>, tm_gccmail at kloo dot net
- Date: Tue, 15 Jun 2004 14:33:42 -0400
- Subject: Re: [PATCH] Improved target tuning in simplify-rtx.c
- References: <Pine.LNX.4.44.0406150912270.26865-100000@www.eyesopen.com>
On Jun 15, 2004, at 12:10, Roger Sayle wrote:
As mentioned by Ian Lance Taylor many of these cost values are
heuristic
in nature. The number of "cycles" taken to execute a given instruction
depends heavily upon the instructions around it and the state of the
pipeline/scheduling group, contents of primary and secondary caches,
position within cache-line, register bypasses, hazzards, etc...
Probably a more realistic cost model would use more than a single
dimension. Possibilities would be: (latency, throughput, code size,
register pressure). Latency, throughput and code size should be
available already and register pressure could be estimated from
the instruction patterns.
Then cost is a weighted sum of these axes, where weights may
differ depending on estimated execution frequency and register
pressure in a particular basic block.
-Geert