Exploiting dual mode operation

[Mircea Namolaru <NAMOLARU at il dot ibm dot com>]

Hello,

For a 64-bit architecture, values defined as 32-bit values in a program 
must
be sign extended (or zero extended, in the case of unsigned values) to 
make 
them 64-bit values.
Some 64-bit architectures support certain operations in both 64-bit and 
32-bit form.
We are working on an optimization for eliminating redundant sign extension
instructions by making use of this duality. Currently this is done only in 
very 
simple cases.

For example in the following code there are explicit sign extension
instructions that could be eliminated :

i2 = extsw i1      //  i1, j1 are 32-bit integers in 64-bits architecture.
j2 = extsw j1
.......
cmpd i2, j2        // This compare is for double word (64-bits).

But, if a half-word compare instruction is available, we could use it and
remove the sign extensions:

cmpw i1, j1        // This compare is for single word (32-bits).

The sign extension instructions are generated after each definition of a
32-bit integer. By examining all the uses of a sign extension instruction
we can decide whether it is redundent or not.

Comments welcome. Thanks,

Leehod and Mircea