Re: Clarification Req: Regarding "memory" clobber for cache operation is required (?)

["Ashok.A" <ashok_kumar_ak at yahoo dot com>]

--- "Ashok.A" <ashok_kumar_ak@yahoo.com> wrote:
> Hello,
> 
> Need one clarification regarding the issue given
> below. Could you please clarify it? 
> 
> To invalidate a cache line, do we really need to
> use "memory" clobber in inline asm?
> 
> Example: (for MIPS-III architecture) 
> 
>    asm ("cache 17, 0(%0)"
>         : /* no outputs */
>         : "r"(ptr));
> 
> Where, 'ptr' (pointer to unsigned char type) points
> to base address of cache to be invalidated.
> 
> For this case, do we need "memory" clobber in the
> inline asm? Or, anyway to specifiy appropriate 
> memory constraints?
> 
> Expecting for yours response ...
> 
> Thanks,
> Ashok
> 
> P.S: I have checked the linux source. Looks neither
>      "memory" clobber nor any memory constraint is
>      specified in inline asm for similar operations
>      in linux source.
> 
>      
> --- Jim Wilson <wilson@specifixinc.com> wrote:
> > Ashok.A wrote:
> > > I need clarification regarding the "+m"
> > constraints.
> > > I heard that "+m" constraints cannot be used
> > > in "inline asm". Is it true?
> > 
> > Current sources will give a warning for both of
> your
> > examples.  Neither 
> > read-write "+" or matching "1" constraints should
> be
> > used with mems in 
> > an asm.  These both require that the operands are
> > the same, but the 
> > compiler is not able to guarantee this for mems. 
> We
> > can only make this 
> > work for register constraints.
> > 
> > Try changing the lw to use %2 instead of %1, and
> > then use "m" for the 
> > second operand.  I think this is the way it is
> > supposed to work nowadays.
> > -- 
> > Jim Wilson, GNU Tools Support,
> > http://www.SpecifixInc.com
> > 
> 
> 
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