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# BLOCK 2 # PRED: 1 [79.0%] (true,exec) <L1>:; T.1_9 = if (1 && T.0_3 > 0)
why this "1 &&" part?
I spent lot of time unnecessary to create super block inside loop by merging block 2 and 3 into block 1.
If vectorizer can not vectorize this loop then it will be reverted to original form using loop versioning. Am I on the right track ?
I am not at all sure what you want to achieve with this transformation; it seems to me that you haven't done anything that could possibly make vectorizer's work easier.
After transforming statements, I should be able to merge all blocks in one super block inside loop. Once that is done vectorizer just needs to do one-to-one replacement.
-- Devang
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