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Re: rs6000.md/altivec.md problem in setting of vector registers
- From: David Edelsohn <dje at watson dot ibm dot com>
- To: Dorit Naishlos <DORIT at il dot ibm dot com>
- Cc: Dale Johannesen <dalej at apple dot com>, gcc at gcc dot gnu dot org
- Date: Thu, 11 Mar 2004 17:38:24 -0500
- Subject: Re: rs6000.md/altivec.md problem in setting of vector registers
- References: <OF45AA3A9B.10F22048-ONC2256E4D.005E56AD-C2256E4E.0000D3E5@il.ibm.com>
>>>>> Dorit Naishlos writes:
Dorit> Thanks, this indeed looks like the right direction, and it seems to support
Dorit> the original suspicion that there is a problem with the "insvsi" pattern of
Dorit> the insns that are used to initialize the va pseudo:
I think the problems with register allocation are a byproduct of
the earlier decision by GCC to use a bitfield to initialize the value.
Because the initializer is an argument to the function, GCC
chooses the CONSTRUCTOR path to materialize it. The comment in
expand_expr_real() expresses it as well as anything:
FIXME: Avoid trying to fill vector constructors piece-meal.
Output them with output_constant_def below unless we're sure
they're zeros. This should go away when vector initializers
are treated like VECTOR_CST instead of arrays.
GCC commits to an poor instruction selection choice and it's downhill from
there. It probably would be better to fix vector initialization, or at
least improve the current hack, instead of trying to change register
allocator behavior.
David