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Re: gcc/1532: Redundant compare instructions on i386


3) We want the compiler to eliminate obvious duplication in setting
   the comparison flags.  That is, the compiler should recognize when
   one compare instruction will produce the same result as a previous
   compare instruction.

...or the other way around. While recently looking at some PowerPC binary code (2.95 generated I think, so it might not actually be like this anymore) for something that was a switch statement, I noticed code like this:

	cmplwi 7,5,0    # compare the unsigned word in r5 to imm zero,
	                # store the result in condition code #7
	... some branch on it
	cmpwi 7,5,0     # compare the _signed_ word in r5 to imm zero
	... more branches

Changing the first compare to be a signed compare, would eliminate
the second compare insn.

Again, this was most likely a 2.95 compiler, so I don't _know_ if this
problem still exists today for PowerPC; but it does make a case for Ian's
suggested optimi[sz]ation as a generic optimisation, not an x86-specific
one.



Segher



p.s. These instructions might read easier as cmplwi cr7,r5,0x0 etc.



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