This is the mail archive of the gcc@gcc.gnu.org mailing list for the GCC project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

Re: trouble with porting architecture


> One common work around on that processor is to consider a few locations
> in page zero (first 256 bytes of memory) as fake 16-bit registers (one or
> two), since these locations are relatively cheap to load/store.

Thanks for the tip.  However, this won't work for any architectures based on
the MC6809: for example, on the Thomson architecture (old French computer
series), page 0 is mapped to the ROM cartridge :-)

--
Eric Botcazou



Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]