This is the mail archive of the
gcc@gcc.gnu.org
mailing list for the GCC project.
Incorrect DWARF-2 register numbers on PPC64?
- From: "Ulrich Weigand" <Ulrich dot Weigand at de dot ibm dot com>
- To: dje at watson dot ibm dot com, geoffk at geoffk dot org
- Cc: gcc at gcc dot gnu dot org
- Date: Thu, 18 Dec 2003 18:31:08 +0100
- Subject: Incorrect DWARF-2 register numbers on PPC64?
- Sensitivity:
Hello,
FYI: this came up on the GDB mailing list -- could you have a look?
Mit freundlichen Gruessen / Best Regards
Ulrich Weigand
--
Dr. Ulrich Weigand
Linux for S/390 Design & Development
IBM Deutschland Entwicklung GmbH, Schoenaicher Str. 220, 71032 Boeblingen
Phone: +49-7031/16-3727 --- Email: Ulrich.Weigand@de.ibm.com
---------------------- Forwarded by Ulrich Weigand/Germany/IBM on
18.12.2003 18:20 ---------------------------
Mark Kettenis <kettenis@chello.nl> on 14.12.2003 18:14:52
To: cagney@gnu.org
cc: weigand@i1.informatik.uni-erlangen.de,
gdb-patches@sources.redhat.com, Ulrich Weigand/Germany/IBM@IBMDE
Subject: Re: [PATCH] S/390 DWARF-2 CFI frame support
Date: Sun, 14 Dec 2003 11:40:50 -0500
From: Andrew Cagney <cagney@gnu.org>
> The reason why I added that hack in the first place is the case where
> the return address column does not correspond to an actual register.
> In that case we must make sure that we don't map it onto one of GDB's
> (pseudo-)registers. Assuming that the compiler has some freedom in
> choosing the return address column number, and considering that the
> DWARF-2 register numbers are largely undocumented for most targets, I
> was worried that I couldn't guarantee this.
>
> AFAICT there is no platform yet where GCC uses a return address column
> number that would be mapped on the wrong GDB register, so I think we
> can safely remove the code. New targets that start using the DWARF-2
> CFI stuff should make sure theur DWARF-2 register number mapping is
> right.
Well, ... the PPC64 return-column, when I last looked, specified the
dwarf2' floating-point status and control register number! But let the
person framifying the PPC64 sort that one out :-)
Argh! Someone teach GCC about the PPC64 DWARF register numbering
please! Before it is too late! Now it is using the PPC32 LR register
number, which just happens to be the PPC64 FPSCR register.
Anyway, with respect to your proposal, yes like it.
I'll see whether I can implement it.
Mark