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Re: [RFC] Addressing Mode Selection Issues.
- From: <tm_gccmail at kloo dot net>
- To: Jim Wilson <wilson at specifixinc dot com>
- Cc: "Naveen Sharma, Noida" <naveens at noida dot hcltech dot com>,gcc at gcc dot gnu dot org, Alexandre Oliva <aoliva at redhat dot com>,Joern Rennecke <joern dot rennecke at superh dot com>
- Date: Mon, 1 Dec 2003 16:12:21 -0800 (PST)
- Subject: Re: [RFC] Addressing Mode Selection Issues.
On 30 Nov 2003, Jim Wilson wrote:
> Some of the scheduler problems can be solved by extending the
> schedulers. There is no reason why the scheduler can't rewrite
> instructions to schedule across an apparent register addressing
> conflict. We just have never tried to write code for that.
I thought about this, and that way lies madness.
You wind up with multiple problems:
1) The instruction scheduler winds up having to know way too much
about the target instruction set. For example, the instruction
scheduler would need to know the number of bits in the displacement
(reg + offset) addressing mode, and whether it has pre/post
increment/decrement addressing modes, and etc.
IMHO, these are not instruction scheduler issues.
2) The instruction scheduler will need to be either multipass or
have some sort of backtracking capability because the scheduler
will create and modify new instructions prior to the current
instruction when it modifies address arithmetic, and these
new instructions will need to be scheduled properly as well.
This has the potential to seriously increase compilation time.
I'm sure there's other reasons, but those are the two most obvious.
Toshi