Re: inline asm constraints for conditions

[Richard Henderson <rth at redhat dot com>]

On Mon, Sep 29, 2003 at 12:47:50PM +0200, Gabriel Paubert wrote:
> Any idea for PPC?
> 
> Each condition register is a 4-bit field, looks like PSImode, but some
> instructions (CR logical) treat them as individual 1 bit fields, where 
> BImode would seem optimal.

For PPC, you'd have to have a builtin type to get access PQImode or CCmode.
You'd then need a builtin function to get access to the bits you want to
use out of the condition (__builtin_cc_gtu(x), or maybe just
__builtin_ppc_compare(x, <4-bit-immediate>)).  The only bit of ugliness
here is that you might have to hack the generic compare-and-branch 
expansion code to make this work, much as we did for __builtin_expect.

I could see that it would be possible to make this work on PPC, since
there are 8 of these registers to allocate, three of which are even
call-saved.  "A mere matter of programming", as they say.

The solution would be largely ppc specific, but could probably be mirrored
on other targets as applicable.



r~