This is the mail archive of the
gcc@gcc.gnu.org
mailing list for the GCC project.
Re: Optimising redundant compares
- From: Richard Earnshaw <rearnsha at arm dot com>
- To: jbeniston at compxs dot com
- Cc: "'Jim Wilson'" <wilson at specifixinc dot com>, gcc at gcc dot gnu dot org, Richard dot Earnshaw at arm dot com
- Date: Fri, 26 Sep 2003 11:47:12 +0100
- Subject: Re: Optimising redundant compares
- Organization: ARM Ltd.
- Reply-to: Richard dot Earnshaw at arm dot com
>
>
> > -----Original Message-----
> > From: Jim Wilson [mailto:wilson@specifixinc.com]
> > Sent: 26 September 2003 07:56
> > To: jbeniston@compxs.com
> > Cc: gcc@gcc.gnu.org
> > Subject: Re: Optimising redundant compares
> >
> >
> > Jon Beniston wrote:
> > > Yep, my port is very similar. The only apparent significant
> > difference
> > > is that I was using a fixed hard register, where as I
> > believe the PPC
> > > allows CC regs to be pseduos.
> >
> > The PPC has 8 condition code registers. Using pseudos lets
> > us allocate
> > values to the 8 available cc registers. If you only have one, then
> > using a hard register should be fine.
>
> After playing around for a while, it would appear that if I use a hard
> register, then GCC will not attempt to optimise the compare
> instructions. However, if I use a pseudo it will, but it will also try
> lots more optimisations that would mean I have to write rules for
> spilling and restoring the CC reg which I don't want to do at this point
> in time. Does this sound correct?
>
Quite believable. GCC is generally reluctant to do any optimizations that
will extend the life of a hard register. The reason being that it can
make register allocation impossible later on.
Maybe the rule could be relaxed in the case of a hard register that is
never a target for allocation to pseudo registers (in that case you know
that extending the life won't affect register allocation). I'm not sure
how easy that would be, but I think it would help in this case.
R.