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I am working on a port of GCC to a machine that has a CC register that is only modified by compare instructions. I have modeled this in GCC using a single hard register rather than cc0. I would like to optimise away redundant compare operations that are produced from the following example:
define_expand for each branch instruction. I assume that somehow in my gen_conditional_branch function, I have to look at the previously generated compare to see if it takes the same operands, and then omit emitting a second compare instruction if they are identical. However,
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