This is the mail archive of the
mailing list for the GCC project.
Re: SH: may miscompile zero extension and test
- From: kaz Kojima <kkojima at rr dot iij4u dot or dot jp>
- To: wilson at tuliptree dot org
- Cc: joern dot rennecke at superh dot com, aoliva at redhat dot com, gcc at gcc dot gnu dot org
- Date: Sun, 10 Aug 2003 16:46:02 +0900
- Subject: Re: SH: may miscompile zero extension and test
- References: <3F35E6B7.firstname.lastname@example.org>
Jim Wilson <email@example.com> wrote:
> Subregs act much like regs when recognizing operands. So if (REG:SI
> ...) is a valid operand, then so is (subreg:SI ...).
> The SH port defines WORD_REGISTER_OPERATIONS, which means if you put a
> QImode value in a register, then you can interchangable use either
> (reg:SI) or (reg:qi) because moving a QImode value sets the entire register.
> You do have to get the signedness right though. There is some
> interaction with LOAD_EXTEND_OP here to only generate the paradoxical
> subreg when the signedness is OK. There are occasional problems with
> this code.
Thanks for the explanation. I'm slowly understanding about such
> It isn't obvious what is wrong from your assembly language fragment.
I'll look the another RTL dumps again to see why zero extension is
removed from the resulting code.