On Tue, Jul 15, 2003 at 10:35:37AM -0700, Julia Nilsson wrote:
There has been lots of research on techniques for dealing with
irregular processors with limited register sets, multiple memory
banks, and odd addressing modes, and commercial compilers for
DSPs and 8-bit microcontrollers aggressively use such techniques
(for example, offset assignment of local variables so that they
can quickly be accessed through address registers with auto
increment or decrement). GCC does not implement such techniques
because they are not needed for the 32- and 64-bit CISC and RISC
processors that are its main target. So, GCC lacks the algorithms
needed to get really good code on such processors (though it
is possible to get correct but slow code).