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Re: Porting GCC to Zilog z80
>> I'm playing with the gcc patches made by Brahmaiah Vallabhane.
>> I have ported them to gcc 3.2.3 and cleaned up. I'm aware of
>> copyright problem, but this is not currently an issue since
>> I plan to rewrite them once the GCC architecture will be clear to me.
> If you are basing your port on an earlier one, then your port will be a
> derivitive work, and we would still need copyright assignments for the
> earlier port.
Yes, I know.
> Rewriting the port helps, but you need to be careful not to copy
> anything from the earlier port. You need to start from scratch
> with your own port.
Anyway I want to change a lot, so probably it will be easier to write
everything from scratch. From the other side I want to avoid the
problems that are present in Brahmaiah Vallabhane patch, so examining his
patch helps :-)
>> So, the question: should BC, DE, and HL registers be defined for the
>> compiler as 16-bit or as splitted 8-bit?
> I think they need to be 8-bit registers, accessed as pairs for 16-bit
> values.
OK, thanks.
> gen_highpart will give you a subreg that refers to the high
> part of a register, but it is uncommon to use this as an operand.
> There is also the problem that gen_highpart is allowed to emit RTL.
> It isn't a function for accessing the high part of a register. It
> is a function for emitting code to access the value in the high
> part of a register which is not quite the same thing.
Thanks for explanation.
--
Alexander Aganichev
url: http://aaganichev.narod.ru
e-mail: aaganichev@yandex.ru
gsm: +7-095-786-1339