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First scheduling pass


Given the following piece of code

void func(int *a, int *b)
{
	a[0] = b[0];
	a[1] = b[1];
	a[2] = b[2];
	...
}

For SH4, I am getting the following assembler

_func:
	mov.l	@r5,r1		<- load 1
	mov.l	r1,@r4		<- store 1 - 2 clock stall
	mov.l	@(4,r5),r1		<- load 2
	mov.l	r1,@(4,r4)		<- store 2 - 2 clock stall
	mov.l	@(8,r5),r1		<- load 3
	mov.l	r1,@(8,r4)		<- store 3 - 2 clock stall
	

Here, I can't get the scheduler to move the loads to the
 top of the basic block. This is because the first scheduling pass
for SH is disabled. Enabling the first scheduling pass causes excessive
 register pressure resulting in lots of spills generated by the register
allocator.

This is related to earlier discussion threads
	http://gcc.gnu.org/ml/gcc/2003-01/msg00308.html
and
	http://gcc.gnu.org/ml/gcc/2003-01/msg00247.html

I plan to re-enable the scheduling *before* register allocation for 
SH4. IMO, the number of spills can be reduced by applying some good 
heuristic(s) to reorder the ready queue. Any ideas for a good solution?

--Sanjiv


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