This is the mail archive of the
gcc@gcc.gnu.org
mailing list for the GCC project.
Re: Supporting multiple instructions sets within a single machine description
- From: Richard Earnshaw <rearnsha at arm dot com>
- To: tm_gccmail at mail dot kloo dot net
- Cc: Jon Beniston <jbeniston at compxs dot com>, gcc at gcc dot gnu dot org, Richard dot Earnshaw at arm dot com
- Date: Thu, 13 Mar 2003 09:45:08 +0000
- Subject: Re: Supporting multiple instructions sets within a single machine description
- Organization: ARM Ltd.
- Reply-to: Richard dot Earnshaw at arm dot com
> On Wed, 12 Mar 2003, Jon Beniston wrote:
>
> >
> > I was wondering what support there is within GCC for supporting multiple
> > instruction sets within a single machine description. E.g. ARM & Thumb
> or MIPS32/MIPS16.
>
> This is already done. USTL!
Don't you mean UTSL!
>
> > Is it possible for GCC to compile to different
> > instructions sets at a finer granularity than a single compilation unit?
> > i.e. Can I get GCC to compile one function in Thumb and another using
> > the full ARM instruction set.
>
> No. It's set using command-line options.
>
At present. I'd like to see an attribute that could change compilation of
individual functions... but it's not easy, given the current structure of
the compiler.
R.