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Re: cache misses in gcc 3.3
- From: Mike Stump <mstump at apple dot com>
- To: Andi Kleen <ak at suse dot de>
- Cc: Mike Stump <mrs at apple dot com>, gcc at gcc dot gnu dot org, tej at melbpc dot org dot au
- Date: Thu, 13 Feb 2003 16:18:21 -0800
- Subject: Re: cache misses in gcc 3.3
On Thursday, February 13, 2003, at 03:13 PM, Andi Kleen wrote:
The TSCs are often turned off on large multiprocessor x86 SMP systems,
because they can go out of sync or the CPUs are deliberately clocked
at slightly different frequencies to make EMP shielding easier. So you
cannot rely on RDTSC working or giving meaningful answers.
A feature need not be present on all systems to use on one system. It
is ok if one system is better than another.