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Re: vector operations and scalar operands
- From: Jan Hubicka <jh at suse dot cz>
- To: Richard Henderson <rth at redhat dot com>, Jan Hubicka <jh at suse dot cz>,gcc at gcc dot gnu dot org, gcc-patches at gcc dot gnu dot org
- Date: Mon, 10 Feb 2003 00:57:32 +0100
- Subject: Re: vector operations and scalar operands
- References: <20030209144619.GE15811@kam.mff.cuni.cz> <20030209190041.GD11644@redhat.com>
> On Sun, Feb 09, 2003 at 03:46:19PM +0100, Jan Hubicka wrote:
> > Hi,
> > the pattern:
> > [(set (match_operand:V4HI 0 "register_operand" "=y")
> > (ashiftrt:V4HI (match_operand:V4HI 1 "register_operand" "0")
> > (match_operand:DI 2 "nonmemory_operand" "yi")))]
> > won't get simplified by my code as it expect vectors in all operands.
> > Some other places of i386.md does this with vectors:
> >
> > (define_insn "mmx_uavgv4hi3"
> > [(set (match_operand:V4HI 0 "register_operand" "=y")
> > (ashiftrt:V4HI
> > (plus:V4HI (plus:V4HI
> > (match_operand:V4HI 1 "register_operand" "0")
> > (match_operand:V4HI 2 "nonimmediate_operand" "ym"))
> > (const_vector:V4HI [(const_int 1)
> > (const_int 1)
> > (const_int 1)
> > (const_int 1)]))
> > (const_int 1)))]
>
> Huh? Both of these cases use a scalar as the rhs of a shift.
OK, here is constant folding bit.
There is problem with folding relationas - simplify_relational_operation
does not take mode of the output as operand and always returns
const0_rtx/const1_rtx.
Would be something wrong with adding the mode?
* simplify-rtx.c (simplify_binary_operation): Simplify vector shifts.
Index: simplify-rtx.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/simplify-rtx.c,v
retrieving revision 1.136
diff -c -3 -p -r1.136 simplify-rtx.c
*** simplify-rtx.c 9 Feb 2003 22:55:35 -0000 1.136
--- simplify-rtx.c 9 Feb 2003 23:52:38 -0000
*************** simplify_binary_operation (code, mode, o
*** 931,936 ****
--- 931,967 ----
return gen_rtx_CONST_VECTOR (mode, v);
}
+ /* Vector shift operations are allowed to take scalar as shift count. */
+ if (VECTOR_MODE_P (mode)
+ && GET_CODE (trueop0) == CONST_VECTOR
+ && GET_CODE (trueop1) == CONST_INT)
+ {
+ int elt_size = GET_MODE_SIZE (GET_MODE_INNER (mode));
+ unsigned n_elts = (GET_MODE_SIZE (mode) / elt_size);
+ enum machine_mode op0mode = GET_MODE (trueop0);
+ int op0_elt_size = GET_MODE_SIZE (GET_MODE_INNER (op0mode));
+ unsigned op0_n_elts = (GET_MODE_SIZE (op0mode) / op0_elt_size);
+ rtvec v = rtvec_alloc (n_elts);
+ unsigned int i;
+
+ if (op0_n_elts != n_elts
+ || (code != ASHIFT && code != ASHIFTRT && code != LSHIFTRT
+ && code != ROTATE && code != ROTATERT))
+ abort ();
+
+ for (i = 0; i < n_elts; i++)
+ {
+ rtx x = simplify_binary_operation (code, GET_MODE_INNER (mode),
+ CONST_VECTOR_ELT (trueop0, i),
+ trueop1);
+ if (!x)
+ return 0;
+ RTVEC_ELT (v, i) = x;
+ }
+
+ return gen_rtx_CONST_VECTOR (mode, v);
+ }
+
if (GET_MODE_CLASS (mode) == MODE_FLOAT
&& GET_CODE (trueop0) == CONST_DOUBLE
&& GET_CODE (trueop1) == CONST_DOUBLE