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Re: An unusual Performance approach using Synthetic registers
- From: dewar at gnat dot com (Robert Dewar)
- To: dewar at gnat dot com, ja_walker at earthlink dot net, lord at emf dot net,mszick at goquest dot com
- Cc: gcc at gcc dot gnu dot org
- Date: Tue, 7 Jan 2003 07:08:42 -0500 (EST)
- Subject: Re: An unusual Performance approach using Synthetic registers
> First, XCHG is what I think of as an Operating System instruction. It is
> quite valuable because the exchange can be limited to a single process on a
> single processor in a multiprocessor system, in conjunction with the locking
> process. It is one of the very reliable ways to implement semaphores.
Please look through the instruction set more carefully, this is NOT the way
you would implement any sychronization instructions on the x86.
Also, be very careful about timing of instructions when you start to look
at the complex instructions of the x86. No one should even think of generating
code for the x86 without reading the Intel guide for compiler writers.
Basically the rule on most variants of the x86 is that you should treat
it as a conventional load/store RISC machine when it comes to generating
code.