Index: i386.md =================================================================== RCS file: /cvs/gcc/gcc/gcc/config/i386/i386.md,v retrieving revision 1.380.4.35 retrieving revision 1.374.2.14 diff -d -u -p -r1.380.4.35 -r1.374.2.14 --- i386.md 4 Dec 2002 23:55:49 -0000 1.380.4.35 +++ i386.md 3 Dec 2002 22:55:00 -0000 1.374.2.14 @@ -1815,7 +1815,7 @@ [(set (match_operand:DI 0 "push_operand" "") (match_operand:DI 1 "immediate_operand" ""))] "TARGET_64BIT && !symbolic_operand (operands[1], DImode) - && !x86_64_immediate_operand (operands[1], DImode)" + && !x86_64_immediate_operand (operands[1], DImode) && 1" [(set (match_dup 0) (match_dup 1)) (set (match_dup 2) (match_dup 3))] "split_di (operands + 1, 1, operands + 2, operands + 3); @@ -2026,7 +2026,7 @@ [(set (match_operand:DI 0 "memory_operand" "") (match_operand:DI 1 "immediate_operand" ""))] "TARGET_64BIT && !symbolic_operand (operands[1], DImode) - && !x86_64_immediate_operand (operands[1], DImode)" + && !x86_64_immediate_operand (operands[1], DImode) && 1" [(set (match_dup 2) (match_dup 3)) (set (match_dup 4) (match_dup 5))] "split_di (operands, 2, operands + 2, operands + 4);") @@ -16260,25 +16260,18 @@ "TARGET_QIMODE_MATH" "if (!ix86_expand_int_movcc (operands)) FAIL; DONE;") -(define_insn_and_split "*movqicc_noc" +(define_insn "*movqicc_noc" [(set (match_operand:QI 0 "register_operand" "=r,r") (if_then_else:QI (match_operator 1 "ix86_comparison_operator" [(reg 17) (const_int 0)]) (match_operand:QI 2 "register_operand" "r,0") (match_operand:QI 3 "register_operand" "0,r")))] "TARGET_CMOVE && !TARGET_PARTIAL_REG_STALL" - "#" - "&& reload_completed" - [(set (match_dup 0) - (if_then_else:SI (match_operator 1 "ix86_comparison_operator" - [(reg 17) (const_int 0)]) - (match_dup 2) - (match_dup 3)))] - "operands[0] = gen_lowpart (SImode, operands[0]); - operands[2] = gen_lowpart (SImode, operands[2]); - operands[3] = gen_lowpart (SImode, operands[3]);" + "@ + cmov%O2%C1\t{%2, %0|%0, %2} + cmov%O2%c1\t{%3, %0|%0, %3}" [(set_attr "type" "icmov") - (set_attr "mode" "SI")]) + (set_attr "mode" "HI")]) (define_expand "movsfcc" [(set (match_operand:SF 0 "register_operand" "") Index: i386.c =================================================================== RCS file: /cvs/gcc/gcc/gcc/config/i386/i386.c,v retrieving revision 1.447.2.42 retrieving revision 1.425.2.18 diff -d -u -p -r1.447.2.42 -r1.425.2.18 --- i386.c 5 Dec 2002 13:11:51 -0000 1.447.2.42 +++ i386.c 3 Dec 2002 22:54:58 -0000 1.425.2.18 @@ -512,7 +512,6 @@ const int x86_sse_partial_regs_for_cvtsd const int x86_sse_typeless_stores = m_ATHLON_K8; const int x86_sse_load0_by_pxor = m_PPRO | m_PENT4; const int x86_use_ffreep = m_ATHLON_K8; -const int x86_rep_movl_optimal = m_386 | m_PENT | m_PPRO | m_K6; /* In case the avreage insn count for single function invocation is lower than this constant, emit fast (but longer) prologue and @@ -4647,25 +4646,9 @@ ix86_expand_prologue () if (!optimize_size) { int count = frame.nregs; - - /* The fast prologue uses move instead of push to save registers. This - is significantly longer, but also executes faster as modern hardware - can execute the moves in parallel, but can't do that for push/pop. - - Be curefull about choosing what prologue to emit: When function takes - many instructions to execute we may use slow version as well as in - case function is known to be outside hot spot (this is known with - feedback only). Weight the size of function by number of registers - to save as it is cheap to use one or two push instructions but very - slow to use many of them. */ if (count) count = (count - 1) * FAST_PROLOGUE_INSN_COUNT; - if (cfun->function_frequency < FUNCTION_FREQUENCY_NORMAL - || (flag_branch_probabilities - && cfun->function_frequency < FUNCTION_FREQUENCY_HOT)) - use_fast_prologue_epilogue = 0; - else - use_fast_prologue_epilogue = !expensive_function_p (count); + use_fast_prologue_epilogue = !expensive_function_p (count); if (TARGET_PROLOGUE_USING_MOVE) use_mov = use_fast_prologue_epilogue; } @@ -9726,15 +9709,9 @@ ix86_expand_int_movcc (operands) emit_move_insn (tmp, operands[2]); operands[2] = tmp; } - if (! register_operand (operands[2], VOIDmode) - && (mode == QImode - || ! register_operand (operands[3], VOIDmode))) - operands[2] = force_reg (mode, operands[2]); - - if (mode == QImode && ! register_operand (operands[3], VOIDmode)) - operands[3] = force_reg (mode, operands[3]); + operands[2] = force_reg (mode, operands[2]); emit_insn (compare_seq); emit_insn (gen_rtx_SET (VOIDmode, operands[0], @@ -10564,12 +10541,8 @@ ix86_expand_movstr (dst, src, count_exp, /* In case we don't know anything about the alignment, default to library version, since it is usually equally fast and result in - shorter code. - - Also emit call when we know that the count is large and call overhead - will not be important. */ - if (!TARGET_INLINE_ALL_STRINGOPS - && (align < UNITS_PER_WORD || !TARGET_REP_MOVL_OPTIMAL)) + shorter code. */ + if (!TARGET_INLINE_ALL_STRINGOPS && align < UNITS_PER_WORD) { end_sequence (); return 0; @@ -10783,12 +10756,8 @@ ix86_expand_clrstr (src, count_exp, alig /* In case we don't know anything about the alignment, default to library version, since it is usually equally fast and result in - shorter code. - - Also emit call when we know that the count is large and call overhead - will not be important. */ - if (!TARGET_INLINE_ALL_STRINGOPS - && (align < UNITS_PER_WORD || !TARGET_REP_MOVL_OPTIMAL)) + shorter code. */ + if (!TARGET_INLINE_ALL_STRINGOPS && align < UNITS_PER_WORD) return 0; if (TARGET_SINGLE_STRINGOP)