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Re: How does the register allocator supports modulo scheduled code?
- From: Jan Hubicka <jh at suse dot cz>
- To: ritu sabharwal <ritusabharwal at hotmail dot com>
- Cc: gcc at gcc dot gnu dot org
- Date: Mon, 23 Dec 2002 14:14:39 +0100
- Subject: Re: How does the register allocator supports modulo scheduled code?
- References: <F136eKljq65Rn8P5o7P00012cd1@hotmail.com>
>
>
> Hello,
> We have done the modulo scheduling for the loops and added that to the
> gcc instruction scheduler. We have replaced the loop block with our
> scheduled code and it is working fine. But now when this is passed to the
> gcc register allocator, we are getting errors in reload pass. Will the gcc
> register allocator can not handle this modulo scheduled code?
What kind of errors do you get exactly? In case the insturctions you
produced match the constraints it should work just OK. In case they
don't reload won't be able to fix up the hard registers. One possible
trick is to do the same as new regalloc does - use pseudos one for each
hard register and manage register allocator to allocate these special
pseudos in the hard registers you want. This is somewhat hackish
tought..
> Also we need to this modulo scheduling for IA64, so we need to do the
> predication for the modulo loop. Is there a way through which we can
> generate the predicate for these loop instructions i.e. how can we change
> the rtl format so that after generating the predicate it will keep that
> predicate in the rtl format and does the remainging gcc passes will support
> this predicated instructions?
There is support for predicated instructions in RTL chain (see if
conversion pass implementation) but currently only few passes are
updated to deal with these. Updating others is very desirable but may
be dificult so I think it should be done soeparately once you have
working modulo scheduling without this feature.
Honza
>
> Best,
> Ritu.
>
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