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Re: "SSE instruction set disabled?"


>> This makes absolute complete sense.
>>
>> "-mmmx", "-msse", "-msse2", and "-m3dnow" (and their corresponding
>> -mno-xxx) should just go away.

>So what do you do if you want your binaries or libraries run on any
>CPU supporting SSE, ie. ATM pIII, p4, athlon-{4,xp,mp}?
>-march=i686 -msse -mfpmath=sse is what you use now, using -march=pentium3
>is not a good idea for the athlons and likewise -march=athlon-xp is
>not a good idea for pentiums.

See this is why it is so confusing.  To GCC, what you wrote is the same
thing since

"-march=pentium3" == "-march=i686 -msse"

To be even more anal, looking through specs

   this               implies
-march=i386         -mcpu=i386
-march=i486         -mcpu=i486
-march=i586         -mcpu=i586
-march=pentium      -mcpu=i586
-march=pentium-mmx  -mcpu=i586 -mmmx
-march=i686         -mcpu=i686
-march=pentiumpro   -mcpu=i686
-march=pentium2     -mcpu=i686 -mmmx
-march=pentium3     -mcpu=i686 -msse
-march=pentium4     -mcpu=pentium4 -msse2
-march=athlon       -mcpu=athlon -m3dnow
-march=athlon-tbird -mcpu=athlon -m3dnow
-march=athlon-xp    -mcpu=athlon -m3dnow -msse
-march=athlon-mp    -mcpu=athlon -m3dnow -msse
-march=athlon-4     -mcpu=athlon -m3dnow -msse
-march=k6           -mcpu=k6
-march=k6-2         -mcpu=k6 -m3dnow
-march=k6-2         -mcpu=k6 -m3dnow

This is just far to difficult for the user to keep track of.  It is VERY
confusing.

Now it really doesn't matter to me if everyone wants just the second column
or the first.  Just please do not have both.

Personally, I was originally arguing for just the first column, but maybe
that was just me.  And the more I think about it the more I think that only
having the second column is the way to go.

It is clear to me that even most technical users have trouble with this.
Many, for example, have no idea that the "Athlon XP, Athlon MP, and (their
horribly misnamed mobile chip) Athlon4" are all the same core and therefore
all have SSE.  Even Mr. Ladd missed the fact that a PIII was the same basic
core as a PentiumPro (Intel's 6th generation x86 chip) with SSE added.

So maybe GCC should depreciate the first column synonyms that are just too
confusing and are missing things like "Duron" and "Celeron <500Mhz" (which
doesn't have SSE), "Celeron >600Mhz" (which does), "WinChip" and whatever
else the Marketing Geniuses come up with.

Just have items for the basic cores that GCC schedules for: i386, i486,
pentium/i586, k6, i686, athlon, pentium4 and whatever the k8-64 gets named.

....

I agree with others "-msse" or "-msse2" should generally imply "
-mfpmath=sse".  Its kind of silly to have to specify that twice.

...

And depreciate "-mcpu" for "-mtune"; it is much more intuitive (at least
for english speakers).

Choose the minimum ARCHitecture (capabilities) that you wish to run the
binary on. Then, if you wish, choose a more recent model to TUNE (optimize)
the binary for.

Kelley Cook



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