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RE: negation of float on H8300
- From: "Sanjiv Kumar Gupta, Noida" <sanjivg at noida dot hcltech dot com>
- To: Jim Wilson <wilson at redhat dot com>, Alan Lehotsky <apl at alum dot mit dot edu>
- Cc: Andreas Schwab <schwab at suse dot de>, Peter Barada <pbarada at mail dot wm dot sps dot mot dot com>, aph at cambridge dot redhat dot com, dhananjayd at kpit dot com, gnuh8 at gnuh8 dot org dot uk, gcc at gcc dot gnu dot org
- Date: Fri, 9 Aug 2002 14:38:17 +0530
- Subject: RE: negation of float on H8300
>Not if it's a signalling NaN. If the chip only supports QNaNs, then
>you might be able to get away with it.
>Flipping the sign bit is correct even for a signalling NaN. See item 2 in
>the Appendix of IEEE Std 754-1985 (Binary Floating-Point Arithmetic).
>See also item 2 in the Appendix of IEEE Std 854-1987 (Radix-Independent
I'll try to write out a patch for this soon.