MIPS compile options (mad & double fp)

[Shane Nay <shane at minirl dot com>]

I'm working on testing the 3.1 series compiler on a TX4927, which is 
a processor made by Toshiba.  What I'm wondering is, this processor 
has a somewhat different combination of features, its pretty much 
exactly like the 4650, but it has a double word FPU.  (64bit and 
32bit formats accepted)  So, would the correct options be-

-mips3 -mmad (?)

In addition, I was wondering if -march/-mcpu spec type patches are 
being accepted for the MIPS tree?  The TX4927 is pretty straight 
forward since it closely mirrors MIPSs' own designs.  The TX79 series 
is a little bit different as it has quite a few additional features, 
and is missing a couple of the standard MIPS instructions.  (I need 
to check the bit pattern on the "mad" instruction as well, might need 
to submit a patch to binutils for that one)

I'm sort of just now getting back into the MIPS platform, I have 
submitted a bugfix in the past that was accepted for MIPS within the 
backend.  Is there a specific maintainer now for the MIPS backend?, I 
believe Richard took the patch last time, but that was circa 
200(0/1).  The backend seems to have advanced significantly since 
then, congrats gcc-mips folk.  (The code is significantly smaller, 
seems like pc relative bl's must be used now for ABI related symbol 
resolution, is resolver code sprinkled around dynamic libraries and 
binaries?, 16 encoded bits isn't enough reach I would imagine)

Thanks,
Shane Nay.