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Re: DFA scheduling for inline assembly.
- From: "David S. Miller" <davem at redhat dot com>
- To: dant at picochip dot com
- Cc: gcc at gcc dot gnu dot org
- Date: Wed, 03 Jul 2002 09:14:33 -0700 (PDT)
- Subject: Re: DFA scheduling for inline assembly.
- References: <3D231EA0.AB1A8AD2@picochip.com>
From: Dan Towner <dant@picochip.com>
Date: Wed, 03 Jul 2002 16:56:16 +0100
The processor uses VLIW and can execute one or more communications in
parallel with conventional ALU/MEM/BRANCH instructions. I am using the
DFA scheduler to generate VLIW'd code, but the inline assembly is never
combined with other instructions. Is there any way that I can detect the
inline assembly instructions so that I can tag them with the EU's they
use so that I can then schedule them alongside other instructions?
One way is to make GCC builtins for the special instructions and the
user uses these builtins instead of inline asm. In this way the
compiler can schedule them just like any other insn.