Re: DFA Instruction Output for VLIW

[law at redhat dot com]

In message <3D0A266A.8B4932FB@picochip.com>, Dan Towner writes:
 > Hi all,
 > 
 > I am using the DFA to schedule code for a VLIW. The assembly language
 > for the target has VLIW packets of the form:
 > 
 > insn1 | insn2 | insn3
 > 
 > At the moment, I can only get the scheduler to emit VLIW'd instructions
 > on successive lines. What is the easiest way to get the DFA scheduler to
 > generate instructions in a single line format, or alternatively,
 > generate a continuation on the end of each VLIW'ed line, but stopping
 > once it has reached the end of the VLIW packet:
 > 
 > insn1 \      
 > insn2 \
 > insn3
 > 
 > Furthermore, some common instructions such as add's or copy's have to
 > mark the EU to which they should be issued:
 > 
 > ADD.0 something | ADD.1 somethingElse
 > 
 > I think that I can solve this by using TARGET_SCHED_REORDER to set an
 > attribute for the instruction, marking the EU to which it should be
 > issued. Does this seem feasible?
The scheduler doesn't handle this kind of stuff.  It can note which insns
are in a VLIW group, but it is not responsible for the actual output
of instructions.

Basically the scheduler will mark the leader or the end of each VLIW
group (I don't recall which offhand).  You're going to need to tweak
your backend to use that information to get the output you want.

jeff