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Re: Short Displacement Problems.
- From: Zack Weinberg <zack at codesourcery dot com>
- To: Richard Kenner <kenner at vlsi1 dot ultra dot nyu dot edu>
- Cc: gcc at gcc dot gnu dot org
- Date: Thu, 30 May 2002 10:23:12 -0700
- Subject: Re: Short Displacement Problems.
- References: <10205301705.AA04761@vlsi1.ultra.nyu.edu>
On Thu, May 30, 2002 at 01:05:05PM -0400, Richard Kenner wrote:
> Consider (stack:MODE slot) instead -- with slot being akin to a
> pseudo-register number, and only one instance of any given stack RTX.
> We could assign memory locations to these with just one linear scan
> over the RTL to replace them with MEM expressions at the end.
> The downside of this is that if the offset is too large for the access
> to be a single insn (always the case in IA64, for example), you have to
> be careful to do this replacement early enough to apply CSE and loop
> optimization to those address computations.
True. We do already do some CSE after register allocation. I'm not
sure what it would take to do loop optimizations there, but it might
help independent of better stack slot assignment. (In general it
seems to me that most optimizations can constructively be run both
before and after register allocation.)