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-fprefetch-loop-arrays on PowerPC
- From: Andreas Conz <andreasc at neuro dot informatik dot uni-kassel dot de>
- To: gcc at gcc dot gnu dot org
- Date: Sun, 26 May 2002 22:14:43 +0200 (DFT)
- Subject: -fprefetch-loop-arrays on PowerPC
Hello,
thanks for the great new GCC 3.1.
I have tried the new -fprefetch-loop-arrays optimizer option.
It is very nice to have it. I know this is a young feature perhaps this
helps improving it.
The generated assembler code contains the following, in my oppinion
suboptimal, instruction sequences:
L..19202:
addic. 5,5,-1
lwz 3,0(6)
addi 12,12,16
lwz 9,4(6)
lwz 11,8(6)
lwz 30,12(6)
addi 6,6,16
stw 3,0(8)
stw 9,4(8)
stw 11,8(8)
stw 30,12(8)
addi 8,8,16
dcbt 0,20 < is the impact of this instruction a subset of
< the next instruction?
dcbtst 0,20 <
ble- 0,L..19176
The next code contains an instructions sequence with the same problem,
but also an other anomaly:
L..19219:
lwz 9,4(5)
addi 12,12,64
lwz 11,8(4)
lwz 31,12(8)
lwz 0,0(6)
dcbt 0,20
stw 0,0(3)
stw 9,4(29)
stw 11,8(28)
stw 31,12(7)
lwz 27,16(6)
lwz 30,20(5)
lwz 25,24(4)
lwz 31,28(8)
stw 27,16(3)
stw 30,20(29)
stw 25,24(28)
stw 31,28(7)
lwz 27,44(8)
lwz 9,32(6)
lwz 11,36(5)
lwz 10,40(4)
stw 9,32(3)
stw 11,36(29)
stw 10,40(28)
stw 27,44(7)
lwz 30,48(6)
addi 6,6,64
lwz 25,52(5)
addi 5,5,64
lwz 31,56(4)
addi 4,4,64
lwz 27,60(8)
addi 8,8,64
stw 30,48(3)
addi 3,3,64
stw 25,52(29)
addi 29,29,64
stw 31,56(28)
addi 28,28,64
stw 27,60(7)
addi 7,7,64
dcbtst 0,20 <
dcbt 0,20 < I my opinion, only the first instruction is
dcbtst 0,20 < neccessary.
dcbt 0,20 <
dcbtst 0,20 <
dcbt 0,20 <
dcbtst 0,20 <
bdnz L..19219
If this is not intended I can provide further information.
mit freundliche Gruessen / kind regards
Andreas Conz
WWW http://www.neuro.informatik.uni-kassel.de/~andreasc
e-mail andreasc@neuro.informatik.uni-kassel.de